/external/llvm/lib/Target/Hexagon/ |
D | HexagonIsetDx.td | 42 let Defs = [R31, R29, R30], Uses = [R30], isCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWordAc… 53 …= [R30, P0], isCodeGenOnly = 1, isPredicated = 1, isPredicatedFalse = 1, mayLoad = 1, accessSize =… 106 let isCodeGenOnly = 1, mayLoad = 1, accessSize = HalfWordAccess, hasNewValue = 1, opNewValue = 0 in 148 let isCodeGenOnly = 1, mayLoad = 1, accessSize = ByteAccess, hasNewValue = 1, opNewValue = 0 in 164 let isCodeGenOnly = 1, mayLoad = 1, accessSize = WordAccess, hasNewValue = 1, opNewValue = 0 in 211 let Defs = [PC, R31, R29, R30], Uses = [R30, P0], isCodeGenOnly = 1, isPredicated = 1, mayLoad = 1,… 303 let isCodeGenOnly = 1, mayLoad = 1, accessSize = HalfWordAccess, hasNewValue = 1, opNewValue = 0 in 422 let isCodeGenOnly = 1, mayLoad = 1, accessSize = ByteAccess, hasNewValue = 1, opNewValue = 0 in 452 let Uses = [R29], isCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWordAccess in 560 let Defs = [PC, R31, R29, R30], Uses = [R30], isCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWo… [all …]
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D | HexagonInstrFormats.td | 209 let mayLoad = 1 in 214 let mayLoad = 1 in 229 let mayLoad = 1 in 234 let mayLoad = 1 in 425 let mayLoad = 1 in
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 97 let mayLoad = 0; 248 let mayLoad = 0; 259 let mayLoad = 0; 272 let mayLoad = 0; 286 let mayLoad = 0; 298 let mayLoad = 0; 315 let mayLoad = 1; 610 let mayLoad = 1; 630 let mayLoad = 1;
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D | R600Instructions.td | 85 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in { 214 } // End mayLoad = 1, mayStore = 0, hasSideEffects = 0 843 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in { 878 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 0 1002 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in { 1018 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 0 1319 let mayLoad = 0, mayStore = 0, hasSideEffects = 1 in { 1328 } // End mayLoad = 0, mayStore = 0, hasSideEffects = 1 1497 let mayLoad = 0;
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D | SIInstrInfo.td | 2147 let mayLoad = 1, mayStore = 1 in { 2154 } // end mayLoad = 1, mayStore = 1 2188 let mayLoad = 1, mayStore = 1 in { 2195 } // end mayLoad = 1, mayStore = 1 2231 let mayStore = 1, mayLoad = 0 in { 2243 } // mayStore = 1, mayLoad = 0 2245 let mayLoad = 1, mayStore = 0 in { 2257 } // mayLoad = 1, mayStore = 0 2380 let mayStore = 1, mayLoad = 1, hasPostISelHook = 1 in { 2426 } // mayStore = 1, mayLoad = 1, hasPostISelHook = 1 [all …]
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZInstrFormats.td | 980 let mayLoad = 1; 987 let mayLoad = 1; 1230 let mayLoad = 1; 1249 let mayLoad = 1; 1262 let mayLoad = 1; 1278 let mayLoad = 1; 1290 let mayLoad = 1; 1301 let mayLoad = 1; 1314 let mayLoad = 1; 1366 let mayLoad = 1; [all …]
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D | SystemZInstrBuilder.h | 33 if (MCID.mayLoad()) in addFrameReference()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 833 let mayLoad = 0, mayStore = 0, hasSideEffects = 1 in 857 // NOTE: ideally, this would have mayStore = 0, mayLoad = 0, but we cannot 859 let mayStore = 1, mayLoad = 1, hasSideEffects = 1 in 1071 let mayLoad = 0, mayStore = 0, hasSideEffects = 1, isReturn = 1 in 1272 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1287 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1563 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1591 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1703 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in 1966 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMOptimizeBarriersPass.cpp | 41 return !(MI->mayLoad() || in CanMovePastDMB()
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/external/llvm/lib/Target/X86/ |
D | X86InstrExtension.td | 46 let mayLoad = 1 in 72 let mayLoad = 1 in 102 let mayLoad = 1 in 112 let mayLoad = 1 in
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D | X86InstrControl.td | 250 let mayLoad = 1 in 262 let mayLoad = 1 in 304 let mayLoad = 1 in 313 let mayLoad = 1 in 325 let mayLoad = 1 in
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D | X86InstrAVX512.td | 503 let mayLoad = 1 in 834 let mayLoad = 1 in 1003 let mayLoad = 1 in { 1074 let mayLoad = 1 in 1165 let mayLoad = 1 in 1176 let mayLoad = 1, Constraints = "$src1 = $dst" in 1240 let mayLoad = 1 in 1251 let mayLoad = 1, Constraints = "$src1 = $dst" in 1326 let mayLoad = 1 in { 1431 let mayLoad = 1 in [all …]
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D | X86InstrBuilder.h | 155 if (MCID.mayLoad())
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D | X86InstrFMA.td | 50 let mayLoad = 1 in 66 let mayLoad = 1 in 153 let mayLoad = 1 in 185 let mayLoad = 1 in
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonShuffler.cpp | 140 setLoad(HexagonMCInstrInfo::getDesc(MCII, *id).mayLoad()); in HexagonCVIResource() 268 if (HexagonMCInstrInfo::getDesc(MCII, *ID).mayLoad()) in check() 327 if (HexagonMCInstrInfo::getDesc(MCII, *ID).mayLoad()) { in check()
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D | HexagonShuffler.h | 88 bool mayLoad() const { return (Load); }; in mayLoad() function
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/external/llvm/lib/Target/PowerPC/ |
D | PPCHazardRecognizers.cpp | 35 if (!MCID->mayLoad()) in isLoadAfterStore() 284 isLoad = MCID.mayLoad(); in GetInstrType()
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/external/llvm/lib/Target/Mips/ |
D | MipsEVAInstrInfo.td | 61 bit mayLoad = 1; 115 bit mayLoad = 1;
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D | MipsDelaySlotFiller.cpp | 401 if (!MI.mayStore() && !MI.mayLoad()) in hasHazard() 409 SeenLoad |= MI.mayLoad(); in hasHazard() 458 HasHazard |= MI.mayLoad() || OrigSeenStore; in hasHazard_() 460 SeenNoObjLoad |= MI.mayLoad(); in hasHazard_()
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D | MicroMipsInstrInfo.td | 256 let mayLoad = 1; 263 let mayLoad = 1; 270 let mayLoad = 1; 296 let mayLoad = 1; 339 let mayLoad = 1; 357 let mayLoad = 1; 374 let mayLoad = 1; 553 let mayLoad = 1; 571 let mayLoad = 1;
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/external/llvm/lib/CodeGen/ |
D | ScheduleDAGInstrs.cpp | 522 (!MI->mayLoad() || !MI->isInvariantLoad(AA))); in isGlobalMemoryObject() 578 if ((MIa->mayLoad() || MIa->mayStore()) && in MIsNeedChainEdge() 579 (MIb->mayLoad() || MIb->mayStore())) in MIsNeedChainEdge() 701 Dep.setLatency(((*I)->getInstr()->mayLoad()) ? LatencyToLoad : 0); in adjustChainDeps() 936 && (HasVRegDef || MI->mayLoad())) { in buildSchedGraph() 986 if (AliasChain->getInstr()->mayLoad()) in buildSchedGraph() 1091 } else if (MI->mayLoad()) { in buildSchedGraph()
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D | TargetInstrInfo.cpp | 532 NewMI->mayLoad()) && in foldMemoryOperand() 861 if (MI->mayLoad() && !MI->isInvariantLoad(AA)) in isReallyTriviallyReMaterializableGeneric() 1034 if (DefMI->mayLoad()) in defaultDefLatency() 1052 return MI->mayLoad() ? 2 : 1; in getInstrLatency()
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/external/llvm/utils/TableGen/ |
D | CodeGenDAGPatterns.cpp | 2744 bool mayLoad; member in InstAnalyzer 2749 : CDP(cdp), hasSideEffects(false), mayStore(false), mayLoad(false), in InstAnalyzer() 2763 if (hasSideEffects || mayLoad || mayStore || isVariadic) in IsNodeBitcast() 2794 if (CP.hasProperty(SDNPMayLoad)) mayLoad = true; in AnalyzeNode() 2813 if (N->NodeHasProperty(SDNPMayLoad, CDP)) mayLoad = true; in AnalyzeNode() 2820 mayLoad = true;// These may load memory. in AnalyzeNode() 2861 if (InstInfo.mayLoad != PatInfo.mayLoad && !InstInfo.mayLoad_Unset) { in InferFromPattern() 2864 if (!InstInfo.mayLoad) { in InferFromPattern() 2867 Twine(InstInfo.mayLoad)); in InferFromPattern() 2874 InstInfo.mayLoad |= PatInfo.mayLoad; in InferFromPattern() [all …]
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyRegStackify.cpp | 117 return !(SawStore && Def->mayLoad() && !Def->isInvariantLoad(&AA)) && in IsSafeToMove()
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/external/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 350 bool mayLoad() const { return Flags & (1 << MCID::MayLoad); } in mayLoad() function
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