/external/v8/src/arm/ |
D | assembler-arm.h | 117 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } in is_valid() 118 bool is(Register reg) const { return reg_code == reg.reg_code; } in is() 121 return reg_code; in code() 125 return 1 << reg_code; in bit() 128 reg_code = code; in set_code() 133 int reg_code; member 147 bool is_valid() const { return 0 <= reg_code && reg_code < 32; } in is_valid() 148 bool is(SwVfpRegister reg) const { return reg_code == reg.reg_code; } in is() 151 return reg_code; in code() 155 return 1 << reg_code; in bit() [all …]
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D | assembler-arm.cc | 636 reg.reg_code = Instruction::RdValue(instr); in GetRd() 643 reg.reg_code = Instruction::RnValue(instr); in GetRn() 650 reg.reg_code = Instruction::RmValue(instr); in GetRm() 2840 int reg_code, in SplitRegCode() argument 2843 DCHECK((reg_code >= 0) && (reg_code <= 31)); in SplitRegCode() 2846 *m = reg_code & 0x1; in SplitRegCode() 2847 *vm = reg_code >> 1; in SplitRegCode() 2850 *m = (reg_code & 0x10) >> 4; in SplitRegCode() 2851 *vm = reg_code & 0x0F; in SplitRegCode()
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D | macro-assembler-arm.cc | 743 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) { in SafepointRegisterStackIndex() argument 746 if (FLAG_enable_embedded_constant_pool && reg_code > pp.code()) { in SafepointRegisterStackIndex() 748 reg_code -= 1; in SafepointRegisterStackIndex() 750 DCHECK(reg_code >= 0 && reg_code < kNumSafepointRegisters); in SafepointRegisterStackIndex() 751 return reg_code; in SafepointRegisterStackIndex()
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/external/v8/src/mips/ |
D | assembler-mips.h | 128 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } in is_valid() 129 bool is(Register reg) const { return reg_code == reg.reg_code; } in is() 132 return reg_code; in code() 136 return 1 << reg_code; in bit() 140 int reg_code; member 176 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } in is_valid() 177 bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } in is() 180 DCHECK(reg_code % 2 == 0); // Specified Double reg must be even. in low() 182 reg.reg_code = reg_code; in low() 188 DCHECK(reg_code % 2 == 0); // Specified Double reg must be even. in high() [all …]
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D | assembler-mips.cc | 324 rt.reg_code = (instr & kRtFieldMask) >> kRtShift; in GetRtReg() 331 rs.reg_code = (instr & kRsFieldMask) >> kRsShift; in GetRsReg() 338 rd.reg_code = (instr & kRdFieldMask) >> kRdShift; in GetRdReg() 2010 rt.reg_code = (cc & 0x0007) << 2 | 1; in movt() 2017 rt.reg_code = (cc & 0x0007) << 2 | 0; in movf() 2301 ft.reg_code = (cc & 0x0007) << 2 | 1; in movt_s() 2309 ft.reg_code = (cc & 0x0007) << 2 | 1; in movt_d() 2317 ft.reg_code = (cc & 0x0007) << 2 | 0; in movf_s() 2325 ft.reg_code = (cc & 0x0007) << 2 | 0; in movf_d()
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D | macro-assembler-mips.cc | 136 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) { in SafepointRegisterStackIndex() argument 139 return kSafepointRegisterStackIndexMap[reg_code]; in SafepointRegisterStackIndex() 2108 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2132 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2159 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2183 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2210 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2234 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2263 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2287 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() [all …]
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/external/v8/src/mips64/ |
D | assembler-mips64.h | 128 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } in is_valid() 129 bool is(Register reg) const { return reg_code == reg.reg_code; } in is() 132 return reg_code; in code() 136 return 1 << reg_code; in bit() 140 int reg_code; member 176 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } in is_valid() 177 bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } in is() 181 DCHECK(reg_code % 2 == 0); // Specified Double reg must be even. in low() 183 reg.reg_code = reg_code; in low() 190 DCHECK(reg_code % 2 == 0); // Specified Double reg must be even. in high() [all …]
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D | assembler-mips64.cc | 298 rt.reg_code = (instr & kRtFieldMask) >> kRtShift; in GetRtReg() 305 rs.reg_code = (instr & kRsFieldMask) >> kRsShift; in GetRsReg() 312 rd.reg_code = (instr & kRdFieldMask) >> kRdShift; in GetRdReg() 2295 rt.reg_code = (cc & 0x0007) << 2 | 1; in movt() 2302 rt.reg_code = (cc & 0x0007) << 2 | 0; in movf() 2638 ft.reg_code = (cc & 0x0007) << 2 | 1; in movt_s() 2646 ft.reg_code = (cc & 0x0007) << 2 | 1; in movt_d() 2654 ft.reg_code = (cc & 0x0007) << 2 | 0; in movf_s() 2662 ft.reg_code = (cc & 0x0007) << 2 | 0; in movf_d()
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D | macro-assembler-mips64.cc | 138 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) { in SafepointRegisterStackIndex() argument 141 return kSafepointRegisterStackIndexMap[reg_code]; in SafepointRegisterStackIndex() 2497 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2521 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2548 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2572 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2599 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2623 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2652 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() 2676 if (rs.code() == rt.rm_.reg_code) { in BranchShortHelperR6() [all …]
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/external/v8/src/arm64/ |
D | simulator-arm64.h | 563 void PrintRead(uintptr_t address, size_t size, unsigned reg_code); 564 void PrintReadFP(uintptr_t address, size_t size, unsigned reg_code); 565 void PrintWrite(uintptr_t address, size_t size, unsigned reg_code); 566 void PrintWriteFP(uintptr_t address, size_t size, unsigned reg_code); 569 void LogRead(uintptr_t address, size_t size, unsigned reg_code) { 570 if (log_parameters() & LOG_REGS) PrintRead(address, size, reg_code); 572 void LogReadFP(uintptr_t address, size_t size, unsigned reg_code) { 573 if (log_parameters() & LOG_FP_REGS) PrintReadFP(address, size, reg_code); 575 void LogWrite(uintptr_t address, size_t size, unsigned reg_code) { 576 if (log_parameters() & LOG_WRITE) PrintWrite(address, size, reg_code); [all …]
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D | assembler-arm64-inl.h | 47 return reg_code; in code() 58 DCHECK(static_cast<size_t>(reg_code) < (sizeof(RegList) * kBitsPerByte)); in Bit() 59 return IsValid() ? 1UL << reg_code : 0; in Bit() 102 ((reg_code < kNumberOfRegisters) || (reg_code == kSPRegInternalCode)); in IsValidRegister() 109 (reg_code < kNumberOfFPRegisters); in IsValidFPRegister() 115 DCHECK((reg_type != kNoRegister) || (reg_code == 0)); in IsNone() 130 return (reg_code == other.reg_code) && (reg_type == other.reg_type); in Aliases() 156 return IsRegister() && (reg_code == kZeroRegCode); in IsZero() 162 return IsRegister() && (reg_code == kSPRegInternalCode); in IsSP() 248 return Register::WRegFromCode(reg_code); in W() [all …]
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D | simulator-arm64.cc | 1179 unsigned reg_code) { in PrintRead() argument 1184 clr_reg_name, XRegNameForCode(reg_code), in PrintRead() 1185 clr_reg_value, reg<uint64_t>(reg_code), clr_normal); in PrintRead() 1194 unsigned reg_code) { in PrintReadFP() argument 1199 clr_fpreg_name, VRegNameForCode(reg_code), in PrintReadFP() 1200 clr_fpreg_value, fpreg<uint64_t>(reg_code), clr_normal, in PrintReadFP() 1201 clr_fpreg_name, SRegNameForCode(reg_code), in PrintReadFP() 1202 clr_fpreg_value, fpreg<float>(reg_code), clr_normal); in PrintReadFP() 1206 clr_fpreg_name, VRegNameForCode(reg_code), in PrintReadFP() 1207 clr_fpreg_value, fpreg<uint64_t>(reg_code), clr_normal, in PrintReadFP() [all …]
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D | assembler-arm64.h | 120 int reg_code; member 132 reg_code = 0; in Register() 138 reg_code = r.reg_code; in Register() 145 reg_code = r.reg_code; in Register() 208 reg_code = 0; in FPRegister() 214 reg_code = r.reg_code; in FPRegister() 221 reg_code = r.reg_code; in FPRegister()
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D | macro-assembler-arm64.cc | 3911 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) { in SafepointRegisterStackIndex() argument 3926 if ((reg_code >= 0) && (reg_code <= 15)) { in SafepointRegisterStackIndex() 3927 return reg_code; in SafepointRegisterStackIndex() 3928 } else if ((reg_code >= 18) && (reg_code <= 27)) { in SafepointRegisterStackIndex() 3930 return reg_code - 2; in SafepointRegisterStackIndex() 3931 } else if ((reg_code == 29) || (reg_code == 30)) { in SafepointRegisterStackIndex() 3933 return reg_code - 3; in SafepointRegisterStackIndex() 4893 int reg_code = RegisterBits::decode(payload32); in InlineSmiCheckInfo() local 4894 reg_ = Register::XRegFromCode(reg_code); in InlineSmiCheckInfo()
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/external/v8/src/x87/ |
D | assembler-x87.h | 125 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } in is_valid() 126 bool is(Register reg) const { return reg_code == reg.reg_code; } in is() 129 return reg_code; in code() 133 return 1 << reg_code; in bit() 136 bool is_byte_register() const { return reg_code <= 3; } in is_byte_register() 139 int reg_code; member 167 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } in is_valid() 171 return reg_code; in code() 174 bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } in is() 178 int reg_code; member
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D | macro-assembler-x87.cc | 2232 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) { in SafepointRegisterStackIndex() argument 2236 DCHECK(reg_code >= 0 && reg_code < kNumSafepointRegisters); in SafepointRegisterStackIndex() 2237 return kNumSafepointRegisters - reg_code - 1; in SafepointRegisterStackIndex()
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/external/v8/src/ppc/ |
D | assembler-ppc.h | 160 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } in is_valid() 161 bool is(Register reg) const { return reg_code == reg.reg_code; } in is() 164 return reg_code; in code() 168 return 1 << reg_code; in bit() 171 reg_code = code; in set_code() 184 int reg_code; member 213 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } in is_valid() 214 bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } in is() 217 return reg_code; in code() 221 return 1 << reg_code; in bit() [all …]
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/external/v8/src/ia32/ |
D | assembler-ia32.h | 126 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } in is_valid() 127 bool is(Register reg) const { return reg_code == reg.reg_code; } in is() 130 return reg_code; in code() 134 return 1 << reg_code; in bit() 137 bool is_byte_register() const { return reg_code <= 3; } in is_byte_register() 140 int reg_code; member 167 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } in is_valid() 171 return reg_code; in code() 174 bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } in is() 178 int reg_code; member
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D | macro-assembler-ia32.cc | 2268 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) { in SafepointRegisterStackIndex() argument 2272 DCHECK(reg_code >= 0 && reg_code < kNumSafepointRegisters); in SafepointRegisterStackIndex() 2273 return kNumSafepointRegisters - reg_code - 1; in SafepointRegisterStackIndex()
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/external/v8/src/x64/ |
D | assembler-x64.h | 122 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } in is_valid() 123 bool is(Register reg) const { return reg_code == reg.reg_code; } in is() 126 return reg_code; in code() 130 return 1 << reg_code; in bit() 133 bool is_byte_register() const { return reg_code <= 3; } in is_byte_register() 136 int high_bit() const { return reg_code >> 3; } in high_bit() 139 int low_bits() const { return reg_code & 0x7; } in low_bits() 143 int reg_code; member 222 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } in is_valid() 223 bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } in is() [all …]
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D | macro-assembler-x64.h | 1646 static int SafepointRegisterStackIndex(int reg_code) { in SafepointRegisterStackIndex() argument 1647 return kNumSafepointRegisters - kSafepointPushRegisterIndices[reg_code] - 1; in SafepointRegisterStackIndex()
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/external/v8/src/ |
D | assembler.cc | 115 DCHECK(reg_code >= 0 && reg_code < kNumRegisters); in ToString() 117 ->GetGeneralRegisterName(reg_code); in ToString() 122 return ((1 << reg_code) & in IsAllocatable() 130 DCHECK(reg_code >= 0 && reg_code < kMaxNumRegisters); in ToString() 132 ->GetDoubleRegisterName(reg_code); in ToString() 137 return ((1 << reg_code) & in IsAllocatable()
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D | frames.cc | 1539 int reg_code[kNumJSCallerSaved]; member 1548 caller_saved_code_data.reg_code[i++] = r; in SetUpJSCallerSavedCodeData() 1556 return caller_saved_code_data.reg_code[n]; in JSCallerSavedCode()
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/external/vixl/src/vixl/a64/ |
D | simulator-a64.h | 1152 void PrintRead(uintptr_t address, unsigned reg_code, 1154 void PrintWrite(uintptr_t address, unsigned reg_code, 1156 void PrintVRead(uintptr_t address, unsigned reg_code, 1158 void PrintVWrite(uintptr_t address, unsigned reg_code, 1162 void LogRead(uintptr_t address, unsigned reg_code, in LogRead() argument 1164 if (trace_parameters() & LOG_REGS) PrintRead(address, reg_code, format); in LogRead() 1166 void LogWrite(uintptr_t address, unsigned reg_code, in LogWrite() argument 1168 if (trace_parameters() & LOG_WRITE) PrintWrite(address, reg_code, format); in LogWrite() 1170 void LogVRead(uintptr_t address, unsigned reg_code, 1173 PrintVRead(address, reg_code, format, lane); [all …]
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D | simulator-a64.cc | 729 unsigned reg_code, in PrintRead() argument 731 registers_[reg_code].NotifyRegisterLogged(); in PrintRead() 736 PrintRegisterRawHelper(reg_code, Reg31IsZeroRegister); in PrintRead() 743 unsigned reg_code, in PrintVRead() argument 746 vregisters_[reg_code].NotifyRegisterLogged(); in PrintVRead() 749 PrintVRegisterRawHelper(reg_code); in PrintVRead() 751 PrintVRegisterFPHelper(reg_code, GetPrintRegLaneSizeInBytes(format), in PrintVRead() 760 unsigned reg_code, in PrintWrite() argument 766 PrintRegisterRawHelper(reg_code, Reg31IsZeroRegister, in PrintWrite() 774 unsigned reg_code, in PrintVWrite() argument [all …]
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