/external/chromium-trace/catapult/third_party/Paste/paste/ |
D | registry.py | 300 self.reglist = [] 310 self.reglist.append({}) 314 myreglist = self.reglist[-1] 333 myreglist = self.reglist[-1] 348 for stacked, obj in six.itervalues(self.reglist[-1]): 350 self.reglist.pop() 488 if not registry or not len(registry.reglist) or \ 495 (registry, registry.reglist[:]) 500 for reglist in registry.reglist: 501 for stacked, obj in six.itervalues(reglist): [all …]
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/external/ltrace/sysdeps/linux-gnu/arm/ |
D | trace.c | 344 unsigned reglist in arm_get_next_pcs() local 346 offset = bitcount(reglist) * 4; in arm_get_next_pcs()
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 732 def tLDMIA : T1I<(outs), (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops), 747 PseudoInstExpansion<(tLDMIA tGPR:$Rn, pred:$p, reglist:$regs)> { 750 let InOperandList = (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops); 760 (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops), 773 (tLDMIA tGPR:$Rn, pred:$p, reglist:$regs)>, 777 def tPOP : T1I<(outs), (ins pred:$p, reglist:$regs, variable_ops), 787 def tPUSH : T1I<(outs), (ins pred:$p, reglist:$regs, variable_ops), 1483 def tPOP_RET : tPseudoExpand<(outs), (ins pred:$p, reglist:$regs, variable_ops), 1485 (tPOP pred:$p, reglist:$regs)>, Sched<[WriteBrL]>;
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D | ARMInstrThumb2.td | 1711 T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 1726 T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 1741 T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 1756 T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 1780 T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 1798 T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 1816 T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 1834 T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3513 reglist:$regs, variable_ops), 3515 (t2LDMIA_UPD GPR:$wb, GPR:$Rn, pred:$p, reglist:$regs)>, [all …]
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D | ARMInstrInfo.td | 445 def reglist : Operand<i32> { 3098 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3107 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3118 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3127 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3138 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3147 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3158 AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3167 AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 3197 reglist:$regs, variable_ops), [all …]
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/external/llvm/lib/Target/Mips/ |
D | MicroMipsInstrInfo.td | 519 def reglist : Operand<i32> { 542 InstSE<(outs), (ins reglist:$rt, mem_mm_12:$addr), 550 InstSE<(outs reglist:$rt), (ins mem_mm_12:$addr), 795 MipsAsmPseudoInst<(outs reglist:$rt), (ins mem_mm_12:$addr), 799 MipsAsmPseudoInst<(outs), (ins reglist:$rt, mem_mm_12:$addr),
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/external/v8/src/ |
D | frames.cc | 1535 int NumRegs(RegList reglist) { return base::bits::CountPopulation(reglist); } in NumRegs() argument
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1860 unsigned reglist = fieldFromInstruction(Insn, 0, 16); in DecodeMemMultipleWritebackInstruction() local 1938 if (!Check(S, DecodeRegListOperand(Inst, reglist, Address, Decoder))) in DecodeMemMultipleWritebackInstruction()
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