/external/opencv3/modules/cudaarithm/src/cuda/ |
D | cmp_mat.cu | 55 void cmpMat(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat&, double, Stream& str… 79 void cmpMat_v1(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, Stream& stream) in cmpMat_v1() argument 82 …gridTransformBinary_< TransformPolicy<T> >(globPtr<T>(src1), globPtr<T>(src2), globPtr<uchar>(dst)… in cmpMat_v1() 114 void cmpMatEq_v4(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, Stream& stream) in cmpMatEq_v4() argument 116 const int vcols = src1.cols >> 2; in cmpMatEq_v4() 118 GlobPtrSz<uint> src1_ = globPtr((uint*) src1.data, src1.step, src1.rows, vcols); in cmpMatEq_v4() 119 GlobPtrSz<uint> src2_ = globPtr((uint*) src2.data, src2.step, src1.rows, vcols); in cmpMatEq_v4() 120 GlobPtrSz<uint> dst_ = globPtr((uint*) dst.data, dst.step, src1.rows, vcols); in cmpMatEq_v4() 124 void cmpMatNe_v4(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, Stream& stream) in cmpMatNe_v4() argument 126 const int vcols = src1.cols >> 2; in cmpMatNe_v4() [all …]
|
D | bitwise_mat.cu | 59 void bitMat(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat& mask, double, Stream… 140 …void bitMatOp(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat& mask, Stream& str… in bitMatOp() argument 142 … GlobPtrSz<T> vsrc1 = globPtr((T*) src1.data, src1.step, src1.rows, src1.cols * src1.channels()); in bitMatOp() 143 … GlobPtrSz<T> vsrc2 = globPtr((T*) src2.data, src2.step, src1.rows, src1.cols * src1.channels()); in bitMatOp() 144 … GlobPtrSz<T> vdst = globPtr((T*) dst.data, dst.step, src1.rows, src1.cols * src1.channels()); in bitMatOp() 147 …ary(vsrc1, vsrc2, vdst, Op<T>(), singleMaskChannels(globPtr<uchar>(mask), src1.channels()), stream… in bitMatOp() 153 void bitMat(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat& mask, double, Stream… in bitMat() argument 155 …typedef void (*func_t)(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat& mask, St… in bitMat() 175 const int depth = src1.depth(); in bitMat() 182 const int bcols = (int) (src1.cols * src1.elemSize()); in bitMat() [all …]
|
D | absdiff_mat.cu | 55 void absDiffMat(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat&, double, Stream&… 91 void absDiffMat_v1(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, Stream& stream) in absDiffMat_v1() argument 93 …gridTransformBinary_< TransformPolicy<T> >(globPtr<T>(src1), globPtr<T>(src2), globPtr<T>(dst), Ab… in absDiffMat_v1() 104 void absDiffMat_v2(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, Stream& stream) in absDiffMat_v2() argument 106 const int vcols = src1.cols >> 1; in absDiffMat_v2() 108 GlobPtrSz<uint> src1_ = globPtr((uint*) src1.data, src1.step, src1.rows, vcols); in absDiffMat_v2() 109 GlobPtrSz<uint> src2_ = globPtr((uint*) src2.data, src2.step, src1.rows, vcols); in absDiffMat_v2() 110 GlobPtrSz<uint> dst_ = globPtr((uint*) dst.data, dst.step, src1.rows, vcols); in absDiffMat_v2() 123 void absDiffMat_v4(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, Stream& stream) in absDiffMat_v4() argument 125 const int vcols = src1.cols >> 2; in absDiffMat_v4() [all …]
|
D | add_mat.cu | 55 void addMat(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat& mask, double, Stream… 68 …void addMat_v1(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat& mask, Stream& st… in addMat_v1() argument 71 …gridTransformBinary(globPtr<T>(src1), globPtr<T>(src2), globPtr<D>(dst), AddOp1<T, D>(), globPtr<u… in addMat_v1() 73 … gridTransformBinary(globPtr<T>(src1), globPtr<T>(src2), globPtr<D>(dst), AddOp1<T, D>(), stream); in addMat_v1() 84 void addMat_v2(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, Stream& stream) in addMat_v2() argument 86 const int vcols = src1.cols >> 1; in addMat_v2() 88 GlobPtrSz<uint> src1_ = globPtr((uint*) src1.data, src1.step, src1.rows, vcols); in addMat_v2() 89 GlobPtrSz<uint> src2_ = globPtr((uint*) src2.data, src2.step, src1.rows, vcols); in addMat_v2() 90 GlobPtrSz<uint> dst_ = globPtr((uint*) dst.data, dst.step, src1.rows, vcols); in addMat_v2() 103 void addMat_v4(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, Stream& stream) in addMat_v4() argument [all …]
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfoV60.td | 45 : V6_LDInst <(outs VectorRegs:$dst), (ins IntRegs:$src1, s4_6Imm:$src2), 50 : V6_LDInst <(outs VectorRegs128B:$dst), (ins IntRegs:$src1, s4_7Imm:$src2), 54 def V6_vL32b_ai : T_vload_ai <"$dst = vmem($src1+#$src2)">, 56 def V6_vL32b_nt_ai : T_vload_ai <"$dst = vmem($src1+#$src2):nt">, 59 def V6_vL32b_ai_128B : T_vload_ai_128B <"$dst = vmem($src1+#$src2)">, 61 def V6_vL32b_nt_ai_128B : T_vload_ai_128B <"$dst = vmem($src1+#$src2):nt">, 66 def V6_vL32Ub_ai : T_vload_ai <"$dst = vmemu($src1+#$src2)">, 68 def V6_vL32Ub_ai_128B : T_vload_ai_128B <"$dst = vmemu($src1+#$src2)">, 74 def V6_vL32b_cur_ai : T_vload_ai <"$dst.cur = vmem($src1+#$src2)">, 76 def V6_vL32b_nt_cur_ai : T_vload_ai <"$dst.cur = vmem($src1+#$src2):nt">, [all …]
|
D | HexagonInstrInfoV5.td | 48 (sra (i64 (add (i64 (sra I64:$src1, u6ImmPred:$src2)), 1)), 57 : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, u6Imm:$src2), 58 "$dst = asrrnd($src1, #$src2)">; 82 def CONST64_Float_Real : LDInst<(outs DoubleRegs:$dst), (ins f64imm:$src1), 83 "$dst = CONST64(#$src1)", 84 [(set F64:$dst, fpimm:$src1)]>, 88 def CONST32_Float_Real : LDInst<(outs IntRegs:$dst), (ins f32imm:$src1), 89 "$dst = CONST32(#$src1)", 90 [(set F32:$dst, fpimm:$src1)]>, 102 def TFRI_f : ALU32_ri<(outs IntRegs:$dst), (ins f32Ext:$src1), [all …]
|
D | HexagonIntrinsicsV60.td | 27 (ins VecDblRegs:$src1), 28 "$dst=vassignp_W($src1)", 29 [(set VecDblRegs:$dst, (int_hexagon_V6_vassignp VecDblRegs:$src1))]>; 33 (ins VecDblRegs128B:$src1), 34 "$dst=vassignp_W_128B($src1)", 36 VecDblRegs128B:$src1))]>; 40 (ins VecDblRegs:$src1), 41 "$dst=lo_W($src1)", 42 [(set VectorRegs:$dst, (int_hexagon_V6_lo VecDblRegs:$src1))]>; 46 (ins VecDblRegs:$src1), [all …]
|
/external/opencv/cxcore/src/ |
D | cxcmp.cpp | 57 worktype a1 = _toggle_macro_(src1[x]), \ 67 worktype a1 = _toggle_macro_(src1[x*2]), \ 70 a1 = _toggle_macro_(src1[x*2+1]); \ 81 worktype a1 = _toggle_macro_(src1[x*3]), \ 84 a1 = _toggle_macro_(src1[x*3+1]); \ 88 a1 = _toggle_macro_(src1[x*3+2]); \ 99 worktype a1 = _toggle_macro_(src1[x*4]), \ 102 a1 = _toggle_macro_(src1[x*4+1]); \ 106 a1 = _toggle_macro_(src1[x*4+2]); \ 110 a1 = _toggle_macro_(src1[x*4+3]); \ [all …]
|
/external/v8/src/ia32/ |
D | assembler-ia32.h | 1056 void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vfmadd132sd() argument 1057 vfmadd132sd(dst, src1, Operand(src2)); in vfmadd132sd() 1059 void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vfmadd213sd() argument 1060 vfmadd213sd(dst, src1, Operand(src2)); in vfmadd213sd() 1062 void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vfmadd231sd() argument 1063 vfmadd231sd(dst, src1, Operand(src2)); in vfmadd231sd() 1065 void vfmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) { in vfmadd132sd() argument 1066 vfmasd(0x99, dst, src1, src2); in vfmadd132sd() 1068 void vfmadd213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) { in vfmadd213sd() argument 1069 vfmasd(0xa9, dst, src1, src2); in vfmadd213sd() [all …]
|
/external/llvm/lib/Target/X86/ |
D | X86InstrXOP.td | 89 (ins VR128:$src1, VR128:$src2), 90 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"), 92 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2))))]>, 95 (ins VR128:$src1, i128mem:$src2), 96 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"), 98 (vt128 (OpNode (vt128 VR128:$src1), 102 (ins i128mem:$src1, VR128:$src2), 103 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"), 105 (vt128 (OpNode (vt128 (bitconvert (loadv2i64 addr:$src1))), 128 (ins VR128:$src1, u8imm:$src2), [all …]
|
D | X86InstrShiftRotate.td | 18 let Constraints = "$src1 = $dst", SchedRW = [WriteShift] in { 20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1), 22 [(set GR8:$dst, (shl GR8:$src1, CL))], IIC_SR>; 23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1), 25 [(set GR16:$dst, (shl GR16:$src1, CL))], IIC_SR>, OpSize16; 26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1), 28 [(set GR32:$dst, (shl GR32:$src1, CL))], IIC_SR>, OpSize32; 29 def SHL64rCL : RI<0xD3, MRM4r, (outs GR64:$dst), (ins GR64:$src1), 31 [(set GR64:$dst, (shl GR64:$src1, CL))], IIC_SR>; 34 def SHL8ri : Ii8<0xC0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, u8imm:$src2), [all …]
|
/external/llvm/test/CodeGen/SystemZ/ |
D | int-cmp-38.ll | 10 define i32 @f1(i32 %src1) { 17 %cond = icmp slt i32 %src1, %src2 20 %mul = mul i32 %src1, %src1 23 %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ] 28 define i32 @f2(i32 %src1) { 35 %cond = icmp ult i32 %src1, %src2 38 %mul = mul i32 %src1, %src1 41 %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ] 46 define i32 @f3(i32 %src1) { 53 %cond = icmp eq i32 %src1, %src2 [all …]
|
D | int-cmp-43.ll | 10 define i64 @f1(i64 %src1) { 17 %cond = icmp slt i64 %src1, %src2 20 %mul = mul i64 %src1, %src1 23 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 28 define i64 @f2(i64 %src1) { 35 %cond = icmp ult i64 %src1, %src2 38 %mul = mul i64 %src1, %src1 41 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 46 define i64 @f3(i64 %src1) { 53 %cond = icmp eq i64 %src1, %src2 [all …]
|
D | int-cmp-42.ll | 10 define i64 @f1(i64 %src1) { 18 %cond = icmp ult i64 %src1, %src2 21 %mul = mul i64 %src1, %src1 24 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 29 define i64 @f2(i64 %src1) { 36 %cond = icmp slt i64 %src1, %src2 39 %mul = mul i64 %src1, %src1 42 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 47 define i64 @f3(i64 %src1) { 55 %cond = icmp eq i64 %src1, %src2 [all …]
|
D | int-cmp-40.ll | 10 define i64 @f1(i64 %src1) { 18 %cond = icmp ult i64 %src1, %src2 21 %mul = mul i64 %src1, %src1 24 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 29 define i64 @f2(i64 %src1) { 36 %cond = icmp slt i64 %src1, %src2 39 %mul = mul i64 %src1, %src1 42 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 47 define i64 @f3(i64 %src1) { 55 %cond = icmp eq i64 %src1, %src2 [all …]
|
D | int-cmp-36.ll | 10 define i32 @f1(i32 %src1) { 18 %cond = icmp slt i32 %src1, %src2 21 %mul = mul i32 %src1, %src1 24 %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ] 29 define i32 @f2(i32 %src1) { 36 %cond = icmp ult i32 %src1, %src2 39 %mul = mul i32 %src1, %src1 42 %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ] 47 define i32 @f3(i32 %src1) { 55 %cond = icmp eq i32 %src1, %src2 [all …]
|
D | int-cmp-37.ll | 10 define i32 @f1(i32 %src1) { 18 %cond = icmp ult i32 %src1, %src2 21 %mul = mul i32 %src1, %src1 24 %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ] 29 define i32 @f2(i32 %src1) { 36 %cond = icmp slt i32 %src1, %src2 39 %mul = mul i32 %src1, %src1 42 %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ] 47 define i32 @f3(i32 %src1) { 55 %cond = icmp eq i32 %src1, %src2 [all …]
|
D | int-cmp-39.ll | 10 define i64 @f1(i64 %src1) { 18 %cond = icmp slt i64 %src1, %src2 21 %mul = mul i64 %src1, %src1 24 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 29 define i64 @f2(i64 %src1) { 36 %cond = icmp ult i64 %src1, %src2 39 %mul = mul i64 %src1, %src1 42 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 47 define i64 @f3(i64 %src1) { 55 %cond = icmp eq i64 %src1, %src2 [all …]
|
D | int-cmp-41.ll | 10 define i64 @f1(i64 %src1) { 18 %cond = icmp slt i64 %src1, %src2 21 %mul = mul i64 %src1, %src1 24 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 29 define i64 @f2(i64 %src1) { 36 %cond = icmp ult i64 %src1, %src2 39 %mul = mul i64 %src1, %src1 42 %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ] 47 define i64 @f3(i64 %src1) { 55 %cond = icmp eq i64 %src1, %src2 [all …]
|
/external/pcre/dist/sljit/ |
D | sljitNativePPC_32.c | 45 sljit_si dst, sljit_si src1, sljit_si src2) in emit_single_op() argument 52 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 59 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 74 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 86 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 90 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 94 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 101 return push_inst(compiler, ADDI | D(dst) | A(src1) | compiler->imm); in emit_single_op() 106 return push_inst(compiler, ADDIS | D(dst) | A(src1) | compiler->imm); in emit_single_op() 110 return push_inst(compiler, ADDIC | D(dst) | A(src1) | compiler->imm); in emit_single_op() [all …]
|
D | sljitNativePPC_64.c | 133 FAIL_IF(push_inst(compiler, EXTSW | S(src1) | A(TMP_REG1))); \ 134 src1 = TMP_REG1; \ 144 FAIL_IF(push_inst(compiler, EXTSW | S(src1) | A(TMP_REG1))); \ 145 src1 = TMP_REG1; \ 149 sljit_si dst, sljit_si src1, sljit_si src2) in emit_single_op() argument 154 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 161 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 174 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 189 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() 201 SLJIT_ASSERT(src1 == TMP_REG1); in emit_single_op() [all …]
|
/external/opencv3/modules/core/src/ |
D | arithm.cpp | 76 void vBinOp(const T* src1, size_t step1, const T* src2, size_t step2, T* dst, size_t step, Size sz) in vBinOp() argument 83 for( ; sz.height--; src1 = (const T *)((const uchar *)src1 + step1), in vBinOp() 95 typename VLoadStore256<T>::reg_type r0 = VLoadStore256<T>::load(src1 + x); in vBinOp() 107 … typename VLoadStore128<T>::reg_type r0 = VLoadStore128<T>::load(src1 + x ); in vBinOp() 108 … typename VLoadStore128<T>::reg_type r1 = VLoadStore128<T>::load(src1 + x + 16/sizeof(T)); in vBinOp() 127 typename VLoadStore64<T>::reg_type r = VLoadStore64<T>::load(src1 + x); in vBinOp() 137 T v0 = op(src1[x], src2[x]); in vBinOp() 138 T v1 = op(src1[x+1], src2[x+1]); in vBinOp() 140 v0 = op(src1[x+2], src2[x+2]); in vBinOp() 141 v1 = op(src1[x+3], src2[x+3]); in vBinOp() [all …]
|
/external/llvm/test/CodeGen/X86/ |
D | avx-unpack.ll | 4 define <8 x float> @unpackhips(<8 x float> %src1, <8 x float> %src2) nounwind uwtable readnone ssp { 6 …%shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 2, i32 10, i32 3, … 11 define <4 x double> @unpackhipd(<4 x double> %src1, <4 x double> %src2) nounwind uwtable readnone s… 13 …%shuffle.i = shufflevector <4 x double> %src1, <4 x double> %src2, <4 x i32> <i32 1, i32 5, i32 3,… 18 define <8 x float> @unpacklops(<8 x float> %src1, <8 x float> %src2) nounwind uwtable readnone ssp { 20 …%shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 0, i32 8, i32 1, i… 25 define <4 x double> @unpacklopd(<4 x double> %src1, <4 x double> %src2) nounwind uwtable readnone s… 27 …%shuffle.i = shufflevector <4 x double> %src1, <4 x double> %src2, <4 x i32> <i32 0, i32 4, i32 2,… 32 define <8 x float> @unpacklops-not(<8 x float> %src1, <8 x float> %src2) nounwind uwtable readnone … 34 …%shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 0, i32 8, i32 1, i… [all …]
|
/external/v8/src/x64/ |
D | assembler-x64.h | 1145 void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vfmadd132sd() argument 1146 vfmasd(0x99, dst, src1, src2); in vfmadd132sd() 1148 void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vfmadd213sd() argument 1149 vfmasd(0xa9, dst, src1, src2); in vfmadd213sd() 1151 void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vfmadd231sd() argument 1152 vfmasd(0xb9, dst, src1, src2); in vfmadd231sd() 1154 void vfmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) { in vfmadd132sd() argument 1155 vfmasd(0x99, dst, src1, src2); in vfmadd132sd() 1157 void vfmadd213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) { in vfmadd213sd() argument 1158 vfmasd(0xa9, dst, src1, src2); in vfmadd213sd() [all …]
|
/external/opencv3/modules/cudaarithm/src/ |
D | element_operations.cpp | 95 …typedef void (*mat_mat_func_t)(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat& … 108 GpuMat src1; in arithm_op() local 110 src1 = getInputMat(_src1, stream); in arithm_op() 131 const int sdepth = src1.empty() ? src2.depth() : src1.depth(); in arithm_op() 132 const int cn = src1.empty() ? src2.channels() : src1.channels(); in arithm_op() 133 const Size size = src1.empty() ? src2.size() : src1.size(); in arithm_op() 141 CV_Assert( !scalar.empty() || (src2.type() == src1.type() && src2.size() == src1.size()) ); in arithm_op() 155 mat_scalar_func(src1, val, false, dst, mask, scale, stream, op); in arithm_op() 157 mat_mat_func(src1, src2, dst, mask, scale, stream, op); in arithm_op() 166 void addMat(const GpuMat& src1, const GpuMat& src2, GpuMat& dst, const GpuMat& mask, double, Stream… [all …]
|