| /external/llvm/test/CodeGen/SPARC/ |
| D | varargs.ll | 10 ; CHECK: stx %i5, [%fp+2215]
11 ; CHECK: stx %i4, [%fp+2207]
12 ; CHECK: stx %i3, [%fp+2199]
13 ; CHECK: stx %i2, [%fp+2191]
16 ; stx [[R]], [%fp+2039]
38 ; stx %[[AP2]], [%fp+2039]
48 ; stx %[[AP2]], [%fp+2039]
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| D | 64spill.ll | 8 ; CHECK: stx [[R]], [%fp+{{.+}}]
19 ; CHECK: stx [[R]], [%fp+{{.+}}]
30 ; CHECK: stx [[R]], [%fp+{{.+}}]
42 ; CHECK: stx [[R]], [%fp+{{.+}}]
53 ; CHECK: stx [[R]], [%fp+{{.+}}]
64 ; CHECK: stx [[R]], [%fp+{{.+}}]
75 ; CHECK: stx [[R]], [%fp+{{.+}}]
86 ; CHECK: stx [[R]], [%fp+{{.+}}]
97 ; CHECK: stx [[R]], [%fp+{{.+}}]
108 ; CHECK: stx [[R]], [%fp+{{.+}}]
|
| D | 64bit.ll | 135 ; CHECK: stx %
139 ; CHECK: stx %
174 ; CHECK: stx [[R]], [%i0+16]
251 ; CHECK: stx
267 ; CHECK: stx
275 ; CHECK: stx %g0, [%i0]
276 ; CHECK: stx %g0, [%i1+8]
279 ; OPT: stx %g0, [%o0]
280 ; OPT: stx %g0, [%o1+8]
|
| D | spillsize.ll | 8 ; CHECK: stx %{{..}}, [%fp+
9 ; CHECK: stx %{{..}}, [%fp+
|
| D | 64abi.ll | 13 ; CHECK: stx %i4, [%i4]
16 ; CHECK: stx [[R2]], [%i4]
47 ; CHECK: stx [[R]], [%sp+2223]
137 ; CHECK: stx %i2, [%sp+2247]
138 ; CHECK: stx %i0, [%sp+2223]
253 ; CHECK: stx %o0, [%i0]
254 ; CHECK: stx %o1, [%i0]
|
| D | 2009-08-28-PIC.ll | 31 ; V9UNOPT: stx [[R]], [%fp+{{.+}}]
|
| D | atomics.ll | 25 ; CHECK: stx {{.+}}, [%o2]
|
| /external/cblas/src/ |
| D | cblas_chpr2.c | 33 *yy=(float *)Y, *tx, *ty, *stx, *sty; in cblas_chpr2() local
82 stx= x+n; in cblas_chpr2()
86 stx = x-2; in cblas_chpr2()
108 while (x != stx); in cblas_chpr2()
|
| D | cblas_cher2.c | 33 *yy=(float *)Y, *tx, *ty, *stx, *sty; in cblas_cher2() local
83 stx= x+n; in cblas_cher2()
87 stx = x-2; in cblas_cher2()
109 while (x != stx); in cblas_cher2()
|
| D | cblas_zher2.c | 33 *yy=(double *)Y, *tx, *ty, *stx, *sty; in cblas_zher2() local
83 stx= x+n; in cblas_zher2()
87 stx = x-2; in cblas_zher2()
109 while (x != stx); in cblas_zher2()
|
| D | cblas_cgemv.c | 39 const float *stx = x; in cblas_cgemv() local
123 stx = x; in cblas_cgemv()
125 else stx = (const float *)X; in cblas_cgemv()
138 F77_cgemv(F77_TA, &F77_N, &F77_M, ALPHA, A, &F77_lda, stx, in cblas_cgemv()
|
| D | cblas_zhpr2.c | 33 *yy=(double *)Y, *stx, *sty; in cblas_zhpr2() local
77 stx = x + n; in cblas_zhpr2()
94 } while (x != stx); in cblas_zhpr2()
|
| /external/llvm/test/MC/Disassembler/Sparc/ |
| D | sparc-mem.txt | 195 # CHECK: stx %o2, [%i0+%l6]
198 # CHECK: stx %o2, [%i0+32]
201 # CHECK: stx %o2, [%g1]
204 # CHECK: stx %o2, [%g1]
|
| /external/llvm/test/MC/Sparc/ |
| D | sparcv9-instructions.s | 105 ! V8-NEXT: stx %fsr,[%g2 + 20]
106 ! V9: stx %fsr, [%g2+20] ! encoding: [0xc3,0x28,0xa0,0x14]
107 stx %fsr,[%g2 + 20]
110 ! V8-NEXT: stx %fsr,[%g2 + %i5]
111 ! V9: stx %fsr, [%g2+%i5] ! encoding: [0xc3,0x28,0x80,0x1d]
112 stx %fsr,[%g2 + %i5]
|
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_state.c | 1427 GLuint stx, sty; in radeonUpdateViewportOffset() local
1434 stx = 31 - ((-1) & RADEON_STIPPLE_COORD_MASK); in radeonUpdateViewportOffset()
1438 m |= ((stx << RADEON_STIPPLE_X_OFFSET_SHIFT) | in radeonUpdateViewportOffset()
|
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_state.c | 1645 GLuint stx, sty; in r200UpdateViewportOffset() local
1652 stx = 31 - ((-1) & R200_STIPPLE_COORD_MASK); in r200UpdateViewportOffset()
1656 m |= ((stx << R200_STIPPLE_X_OFFSET_SHIFT) | in r200UpdateViewportOffset()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstr64Bit.td | 280 defm STX : Store<"stx", 0b001110, store, I64Regs, i64>;
|
| D | SparcInstrInfo.td | 499 "stx %fsr, [$addr]", []>, Requires<[HasV9]>;
501 "stx %fsr, [$addr]", []>, Requires<[HasV9]>;
|