| /external/llvm/test/Transforms/InstSimplify/ |
| D | implies.ll | 19 %res = icmp ule i1 %var30, %var29
30 %res = icmp ule i1 %var30, %var29
52 %res = icmp ule i1 %var30, %var29
57 ; With an inverted conditional (ule B A rather than canonical ugt A B
75 %res = icmp ule i1 %var30, %var29
83 %res = icmp ule <4 x i1> %vec, %vec
91 %res = icmp ule <4 x i1> %a, %b
103 %res = icmp ule i1 %var30, %var29
115 %res = icmp ule i1 %var30, %var29
126 %res = icmp ule i1 %var30, %var29
[all …]
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| D | AndOrXor.ll | 55 %2 = icmp ule i32 %1, 3
85 %2 = icmp ule i32 %1, 3
136 %cmp3 = icmp ule i32 %b, 2
146 %cmp3 = icmp ule i32 %b, 2
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| /external/llvm/lib/IR/ |
| D | ConstantRange.cpp | 278 return Lower.ule(V) && V.ult(Upper); in contains()
279 return Lower.ule(V) || V.ult(Upper); in contains()
294 return Lower.ule(Other.getLower()) && Other.getUpper().ule(Upper); in contains()
298 return Other.getUpper().ule(Upper) || in contains()
299 Lower.ule(Other.getLower()); in contains()
301 return Other.getUpper().ule(Upper) && Lower.ule(Other.getLower()); in contains()
338 if (Upper.ule(CR.Lower)) in intersectWith()
360 if (CR.Upper.ule(Lower)) in intersectWith()
368 if (CR.Upper.ule(Lower)) in intersectWith()
388 if (CR.Upper.ule(Lower)) { in intersectWith()
[all …]
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| /external/llvm/test/CodeGen/Mips/ |
| D | select.ll | 280 ; 32: c.ule.s $[[F2]], $[[F3]]
286 ; 32R2: c.ule.s $[[F2]], $[[F3]]
295 ; 64: c.ule.s $f14, $f15
299 ; 64R2: c.ule.s $f14, $f15
317 ; 32: c.ule.s $[[F2]], $[[F3]]
323 ; 32R2: c.ule.s $[[F2]], $[[F3]]
332 ; 64: c.ule.s $f14, $f15
336 ; 64R2: c.ule.s $f14, $f15
428 ; 32: c.ule.d $[[F2]], $[[F3]]
434 ; 32R2: c.ule.d $[[F2]], $[[F3]]
[all …]
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| D | setule.ll | 15 %cmp = icmp ule i32 %0, %1
22 %cmp1 = icmp ule i32 %2, %1
|
| D | fcmp.ll | 53 ; 32-C-DAG: c.ule.s $f12, $f14
57 ; 64-C-DAG: c.ule.s $f12, $f13
256 ; 32-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f14, $f12
260 ; 64-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f13, $f12
298 ; 32-C-DAG: c.ule.s $f12, $f14
302 ; 64-C-DAG: c.ule.s $f12, $f13
305 ; 32-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f12, $f14
309 ; 64-CMP-DAG: cmp.ule.s $[[T0:f[0-9]+]], $f12, $f13
313 %1 = fcmp ule float %a, %b
414 ; 32-C-DAG: c.ule.d $f12, $f14
[all …]
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| D | fpbr.ll | 50 ; 32-GPR: cmp.ule.s $[[FGRCC:f[0-9]+]], $f14, $f12
51 ; 64-GPR: cmp.ule.s $[[FGRCC:f[0-9]+]], $f13, $f12
138 ; 32-GPR: cmp.ule.d $[[FGRCC:f[0-9]+]], $f14, $f12
139 ; 64-GPR: cmp.ule.d $[[FGRCC:f[0-9]+]], $f13, $f12
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.amdgpu.kilp.ll | 8 %0 = icmp ule i32 0, 3
11 %2 = icmp ule i32 3, 0
|
| D | llvm.AMDGPU.kill.ll | 10 %0 = icmp ule i32 0, 3
13 %2 = icmp ule i32 3, 0
|
| D | unsupported-cc.ll | 84 %0 = icmp ule i32 %in, 5
97 %0 = fcmp ule float %in, 5.0
109 %0 = fcmp ule float %in, 5.0
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | cond-sel.ll | 61 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
77 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
101 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
117 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
141 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
157 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
190 %tst2 = icmp ule i64 %lhs64, %rhs64
209 %tst2 = icmp ule i64 %lhs64, %rhs64
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| /external/llvm/test/ExecutionEngine/OrcMCJIT/ |
| D | test-setcond-int.ll | 23 %test4 = icmp ule i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
29 %test10 = icmp ule i16 %ushort1, %ushort2 ; <i1> [#uses=0]
35 %test16 = icmp ule i32 %uint1, %uint2 ; <i1> [#uses=0]
41 %test22 = icmp ule i64 %ulong1, %ulong2 ; <i1> [#uses=0]
|
| /external/llvm/test/ExecutionEngine/MCJIT/ |
| D | test-setcond-int.ll | 23 %test4 = icmp ule i8 %ubyte1, %ubyte2 ; <i1> [#uses=0]
29 %test10 = icmp ule i16 %ushort1, %ushort2 ; <i1> [#uses=0]
35 %test16 = icmp ule i32 %uint1, %uint2 ; <i1> [#uses=0]
41 %test22 = icmp ule i64 %ulong1, %ulong2 ; <i1> [#uses=0]
|
| /external/llvm/test/ExecutionEngine/ |
| D | test-interp-vec-setcond-int.ll | 23 %test4 = icmp ule <5 x i8> %ubyte1, %ubyte2
29 %test10 = icmp ule <4 x i16> %ushort1, %ushort2
35 %test16 = icmp ule <3 x i32> %uint1, %uint2
41 %test22 = icmp ule <2 x i64> %ulong1, %ulong2
|
| /external/llvm/test/CodeGen/X86/ |
| D | rrlist-livereg-corrutpion.ll | 9 %i = icmp ule i64 %a, 1
21 %w = icmp ule i256 %n, 1
|
| D | 2012-07-15-BuildVectorPromote.ll | 5 %cmp = icmp ule <1 x i32> undef, undef
|
| /external/llvm/test/Transforms/InstCombine/ |
| D | 2012-03-10-InstCombine.ll | 18 %cmp2 = icmp ule i8* %d, %f
26 %not.cmp3 = icmp ule i8* %c, %f
|
| /external/llvm/test/Transforms/ADCE/ |
| D | 2002-07-17-PHIAssertion.ll | 21 %cond241 = icmp ule i32 %reg117, %reg128 ; <i1> [#uses=1]
33 %cond247 = icmp ule i32 %reg126, 7 ; <i1> [#uses=1]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | vminmaxnm.ll | 54 %cmp = fcmp fast ule float %a, %b
144 %cmp = fcmp fast ule double %a, %b
210 %cmp1 = fcmp fast ule float 34., %b
212 %cmp2 = fcmp fast ule float %cond1, 56.
320 %cmp1 = fcmp fast ule double 78., %b
322 %cmp2 = fcmp fast ule double %cond1, 90.
356 %cmp1 = fcmp fast ule float 0., %a
368 %cmp1 = fcmp fast ule float -0., %a
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| D | vminmaxnm-safe.ll | 86 %cmp = fcmp ule float %a, %b
166 %cmp = fcmp ule double %a, %b
232 %cmp1 = fcmp ule float 34., %b
234 %cmp2 = fcmp ule float %cond1, 56.
342 %cmp1 = fcmp ule double 78., %b
344 %cmp2 = fcmp ule double %cond1, 90.
386 %cmp1 = fcmp nsz ule float -0., %a
|
| /external/llvm/lib/Analysis/ |
| D | ScalarEvolutionAliasAnalysis.cpp | 56 if (ASizeInt.ule(SE.getUnsignedRange(BA).getUnsignedMin()) && in alias()
70 if (BSizeInt.ule(SE.getUnsignedRange(AB).getUnsignedMin()) && in alias()
|
| /external/llvm/test/Transforms/MemCpyOpt/ |
| D | memset-memcpy-redundant-memset.ll | 7 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, %src_size
22 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i64 [[DSTSIZE]], %src_size
37 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i128 %dst_size, [[SRCSIZE]]
52 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i128 [[DSTSIZE]], %src_size
67 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, [[SRCSIZE]]
106 ; CHECK-DAG: [[ULE:%[0-9]+]] = icmp ule i64 %dst_size, %src_size
|
| /external/llvm/test/Bitcode/ |
| D | miscInstructions.3.2.ll | 90 ; CHECK-NEXT: %res6 = icmp ule i32 %x1, %x2
91 %res6 = icmp ule i32 %x1, %x2
132 ; CHECK-NEXT: %res6 = fcmp ule float %x1, %x2
133 %res6 = fcmp ule float %x1, %x2
|
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| D | valid-xfail-mips32.txt | 25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30
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| /external/llvm/test/Transforms/IndVarSimplify/ |
| D | widen-loop-comp.ll | 173 ; CHECK: icmp ule i64
182 %cmp = icmp ule i32 %i.0, %b
229 ; CHECK: icmp ule i64 %indvars.iv, [[B_ZEXT]]
239 %cmp = icmp ule i32 %i.0, %b
262 ; CHECK: icmp ule i64 %indvars.iv, [[B_ZEXT]]
271 %cmp = icmp ule i32 %i.0, %b
|