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Searched refs:v256i8 (Results 1 – 9 of 9) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DMachineValueType.h76 v256i8 = 29, //256 x i8 enumerator
272 return (SimpleTy == MVT::v256i8 || SimpleTy == MVT::v128i16 || in is2048BitVector()
326 case v256i8: return i8; in getVectorElementType()
370 case v256i8: return 256; in getVectorNumElements()
501 case v256i8: in getSizeInBits()
604 if (NumElements == 256) return MVT::v256i8; in getVectorVT()
DValueTypes.td53 def v256i8 : ValueType<2048,29>; //256 x i8 vector value
/external/llvm/lib/IR/
DValueTypes.cpp156 case MVT::v256i8: return "v256i8"; in getEVTString()
234 case MVT::v256i8: return VectorType::get(Type::getInt8Ty(Context), 256); in getTypeForEVT()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoVector.td87 defm : bitconvert_dblvec128B<v256i8, v128i16>;
90 defm : bitconvert_dblvec128B<v64i32, v256i8>;
91 defm : bitconvert_dblvec128B<v32i64, v256i8>;
92 defm : bitconvert_dblvec128B<v128i16, v256i8>;
DHexagonISelLowering.cpp210 LocVT == MVT::v256i8) { in CC_Hexagon_VarArg()
361 LocVT == MVT::v256i8)) { in CC_HexagonVector()
421 } else if (LocVT == MVT::v256i8 || LocVT == MVT::v128i16 || in RetCC_Hexagon()
549 ty == MVT::v256i8 || in IsHvxVectorType()
1105 RegVT == MVT::v128i16 || RegVT == MVT::v256i8))) { in LowerFormalArguments()
1580 addRegisterClass(MVT::v256i8, &Hexagon::VecDblRegs128BRegClass); in HexagonTargetLowering()
1817 setOperationAction(ISD::CONCAT_VECTORS, MVT::v256i8, Custom); in HexagonTargetLowering()
2693 case MVT::v256i8: in getRegForInlineAsmConstraint()
2842 case MVT::v256i8: in findRepresentativeClass()
DHexagonRegisterInfo.td229 [v256i8,v128i16,v64i32,v32i64], 2048,
DHexagonInstrInfoV60.td780 defm : STrivv_pats <v128i8, v256i8>;
839 defm : LDrivv_pats <v128i8, v256i8>;
/external/llvm/utils/TableGen/
DCodeGenTarget.cpp89 case MVT::v256i8: return "MVT::v256i8"; in getEnumName()
/external/llvm/include/llvm/IR/
DIntrinsics.td175 def llvm_v256i8_ty : LLVMType<v256i8>; //256 x i8