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Searched refs:i8 (Results 1 – 25 of 28) sorted by relevance

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/frameworks/rs/driver/runtime/ll64/
Dallocation.ll6 declare i8* @rsOffset(%struct.rs_allocation* nocapture readonly %a, i32 %sizeOf, i32 %x, i32 %y, i3…
7 declare i8* @rsOffsetNs(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i32 %z)
38 define void @rsSetElementAtImpl_char(%struct.rs_allocation* nocapture readonly %a, i8 signext %val,…
39 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 1, i32 %x, i32 %y, i32 %z) #2
40 store i8 %val, i8* %1, align 1, !tbaa !21
44 define signext i8 @rsGetElementAtImpl_char(%struct.rs_allocation* nocapture readonly %a, i32 %x, i3…
45 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 1, i32 %x, i32 %y, i32 %z) #2
46 %2 = load i8, i8* %1, align 1, !tbaa !21
47 ret i8 %2
52 %1 = tail call i8* @rsOffset(%struct.rs_allocation* %a, i32 2, i32 %x, i32 %y, i32 %z) #2
[all …]
/frameworks/rs/driver/runtime/ll32/
Dallocation.ll1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
4 declare i8* @rsOffset([1 x i32] %a.coerce, i32 %sizeOf, i32 %x, i32 %y, i32 %z)
5 declare i8* @rsOffsetNs([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z)
36 define void @rsSetElementAtImpl_char([1 x i32] %a.coerce, i8 signext %val, i32 %x, i32 %y, i32 %z) …
37 %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 1, i32 %x, i32 %y, i32 %z) #2
38 store i8 %val, i8* %1, align 1, !tbaa !21
42 define signext i8 @rsGetElementAtImpl_char([1 x i32] %a.coerce, i32 %x, i32 %y, i32 %z) #0 {
43 %1 = tail call i8* @rsOffset([1 x i32] %a.coerce, i32 1, i32 %x, i32 %y, i32 %z) #2
44 %2 = load i8, i8* %1, align 1, !tbaa !21
45 ret i8 %2
[all …]
Dmath.ll1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
/frameworks/compile/libbcc/tests/libbcc/
Dtest_reduce_general_metadata.ll46 …i8*] [i8* bitcast (void (<2 x i32>*)* @fz2Init to i8*), i8* bitcast (void ([256 x i32]*, [256 x i3…
90 %1 = bitcast %struct.MinAndMax.0* %accum to i8*
91 …tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* bitcast (%struct.MinAndMax.0* @fMMInit.r to …
96 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #0
241 define internal void @hsgAccum([256 x i32]* nocapture %h, i8 %in) #0 {
242 %1 = zext i8 %in to i64
Dtest_reduce_general_cleanup.ll29 @.rs.reduce_fn.aiAccum = global i8* bitcast (void (i32*, i32)* @aiAccum to i8*), align 4
30 @.rs.reduce_fn.dpAccum = global i8* bitcast (void (float*, float, float)* @dpAccum to i8*), align 4
31 @.rs.reduce_fn.dpSum = global i8* bitcast (void (float*, float*)* @dpSum to i8*), align 4
32 @.rs.reduce_fn.fMMInit = global i8* bitcast (void (%struct.MinAndMax*)* @fMMInit to i8*), align 4
33 @.rs.reduce_fn.fMMAccumulator = global i8* bitcast (void (%struct.MinAndMax*, float, i32)* @fMMAccu…
34 @.rs.reduce_fn.fMMCombiner = global i8* bitcast (void (%struct.MinAndMax*, %struct.MinAndMax*)* @fM…
35 ….rs.reduce_fn.fMMOutConverter = global i8* bitcast (void (<2 x i32>*, %struct.MinAndMax*)* @fMMOut…
36 @.rs.reduce_fn.fzInit = global i8* bitcast (void (i32*)* @fzInit to i8*), align 4
37 @.rs.reduce_fn.fzAccum = global i8* bitcast (void (i32*, i32, i32)* @fzAccum to i8*), align 4
38 @.rs.reduce_fn.fzCombine = global i8* bitcast (void (i32*, i32*)* @fzCombine to i8*), align 4
[all …]
Dgetelementptr.ll31 ; CHECK: load i8*, i8** %input_buf.gep
33 ; CHECK: load i8*, i8** %out_buf.gep
47 ; CHECK: load i8*, i8** %out_buf.gep
53 ; CHECK: load i8*, i8** %input_buf.gep
55 ; CHECK: load i8*, i8** %input_buf.gep1
Dtbaa-through-alloca.ll39 %5 = bitcast %struct.int5.0* %agg.result to i8*
40 %6 = bitcast %struct.int5.0* %in to i8*
41 …tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* %6, i64 20, i32 4, i1 false), !tbaa.struct !…
46 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #0
Dtbaa.ll21 ; CHECK: NoAlias: %0 = load {{.*}}, i8** %out_buf.gep, !tbaa {{.*}} <-> store i32 %call.resul…
22 ; CHECK: NoAlias: %input_buf = load i8*, i8** %input_buf.gep, !tbaa {{.*}} <-> store i32 %cal…
/frameworks/rs/driver/runtime/arch/
Dneon.ll1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
26 declare <8 x i8> @llvm.arm.neon.vqshiftns.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
30 declare <8 x i8> @llvm.arm.neon.vqshiftnu.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
34 declare <8 x i8> @llvm.arm.neon.vqshiftnsu.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
370 define signext i8 @_Z3maxcc(i8 signext %v1, i8 signext %v2) nounwind readnone {
371 %1 = icmp sgt i8 %v1, %v2
372 %2 = select i1 %1, i8 %v1, i8 %v2
373 ret i8 %2
376 define <2 x i8> @_Z3maxDv2_cS_(<2 x i8> %v1, <2 x i8> %v2) nounwind readnone {
377 %1 = sext <2 x i8> %v1 to <2 x i32>
[all …]
Dasimd.ll26 declare <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
30 declare <8 x i8> @llvm.aarch64.neon.sqshrun.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
366 define signext i8 @_Z3maxcc(i8 signext %v1, i8 signext %v2) nounwind readnone {
367 %1 = icmp sgt i8 %v1, %v2
368 %2 = select i1 %1, i8 %v1, i8 %v2
369 ret i8 %2
372 define <2 x i8> @_Z3maxDv2_cS_(<2 x i8> %v1, <2 x i8> %v2) nounwind readnone {
373 %1 = sext <2 x i8> %v1 to <2 x i32>
374 %2 = sext <2 x i8> %v2 to <2 x i32>
376 %4 = trunc <2 x i32> %3 to <2 x i8>
[all …]
Dx86_sse3.ll1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
Dx86_sse2.ll1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
/frameworks/rs/cpu_ref/
DrsCpuIntrinsics_neon_YuvToRGB.S34 vmov.i8 d15, #149
39 vmov.i8 d14, #50
40 vmov.i8 d15, #104
52 vmov.i8 d14, #204
53 vmov.i8 d15, #254
96 vmov.i8 q3, #0xff
137 vmov.i8 q8, #0
138 vmov.i8 q10, #0
DrsCpuIntrinsics_neon_Blend.S61 vmov.i8 q0, #0
62 vmov.i8 q1, #0
63 vmov.i8 q2, #0
64 vmov.i8 q3, #0
490 vmov.i8 q0, #0
491 vmov.i8 q1, #0
492 vmov.i8 q2, #0
493 vmov.i8 q3, #0
495 vmov.i8 q8, #0
496 vmov.i8 q9, #0
[all …]
/frameworks/rs/api/
Drs_convert.spec28 t: u8, u16, u32, i8, i16, i32, f32
29 t: u8, u16, u32, i8, i16, i32, f32
61 t: u8, u16, u32, i8, i16, i32, f32
70 t: u8, u16, u32, i8, i16, i32, f32
81 t: u8, u16, u32, u64, i8, i16, i32, i64, f16, f32, f64
90 t: u8, u16, u32, u64, i8, i16, i32, i64, f32, f64
Drs_allocation_create.spec174 t: u8, u16, u32, u64, i8, i16, i32, i64, f16, f32, f64
189 t: u8, u16, u32, u64, i8, i16, i32, i64, f16, f32, f64
203 t: u8, u16, u32, u64, i8, i16, i32, i64, f16, f32, f64
217 t: u8, u16, u32, u64, i8, i16, i32, i64, f16, f32, f64
230 t: u8, u16, u32, u64, i8, i16, i32, i64, f16, f32, f64
243 t: u8, u16, u32, u64, i8, i16, i32, i64, f16, f32, f64
Drs_debug.spec81 t: i8, u8, i16, u16
Drs_math.spec156 t: i8, i16, i32
514 t: u8, u16, u32, u64, i8, i16, i32, i64
525 t: u8, u16, u32, u64, i8, i16, i32, i64
558 t: u8, u16, u32, i8, i16, i32
1507 t: i8, i16, i32, u8, u16, u32
1519 t: i8, i16, i32, u8, u16, u32
1534 t: i8, i16, i32, u8, u16, u32
1550 t: i8, i16, i32, u8, u16, u32
1567 t: i8, i16, i32, i64, u8, u16, u32, u64
1620 t: i8, i16, i32, u8, u16, u32
[all …]
/frameworks/av/media/mtp/
DMtpProperty.cpp72 mDefaultValue.u.i8 = defaultValue; in MtpProperty()
249 mMinimumValue.u.i8 = min; in setFormRange()
250 mMaximumValue.u.i8 = max; in setFormRange()
251 mStepSize.u.i8 = step; in setFormRange()
304 mEnumValues[i].u.i8 = value; in setFormEnum()
389 buffer.appendFormat("%d", value.u.i8); in print()
435 if (!packet.getInt8(value.u.i8)) return false; in readValue()
490 packet.putInt8(value.u.i8); in writeValue()
DMtpProperty.h28 int8_t i8; member
/frameworks/av/media/libstagefright/codecs/on2/h264dec/inc/
Dbasetype.h29 typedef signed char i8; typedef
/frameworks/av/include/media/
DAudioBufferProvider.h36 int8_t* i8; member
DAudioRecord.h83 int8_t* i8; // unsigned 8-bit, offset by 0x80 member
DAudioTrack.h105 int8_t* i8; // unsigned 8-bit, offset by 0x80 member
/frameworks/opt/net/voip/src/jni/rtp/
DAudioGroup.cpp893 memcpy(buffer.i8, &output[offset], buffer.size); in threadLoop()
909 memcpy(&input[offset], buffer.i8, buffer.size); in threadLoop()

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