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Searched refs:AH (Results 1 – 25 of 107) sorted by relevance

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/external/tcpdump/tests/
Dospf3_ah-vv.out1 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 60) fe80::1 > ff02::5: AH(spi=0x000001…
6 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 60) fe80::2 > ff02::5: AH(spi=0x000001…
11 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 64) fe80::1 > ff02::5: AH(spi=0x000001…
17 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 64) fe80::2 > ff02::5: AH(spi=0x000001…
23 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 64) fe80::1 > ff02::5: AH(spi=0x000001…
29 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 64) fe80::2 > ff02::5: AH(spi=0x000001…
35 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 64) fe80::1 > ff02::5: AH(spi=0x000001…
42 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 52) fe80::1 > fe80::2: AH(spi=0x000001…
45 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 64) fe80::2 > ff02::5: AH(spi=0x000001…
51 IP6 (class 0xe0, hlim 1, next-header AH (51) payload length: 52) fe80::1 > fe80::2: AH(spi=0x000001…
[all …]
/external/boringssl/src/crypto/sha/asm/
Dsha256-586.pl358 my @AH=($A,$K256);
363 &mov ($AH[0],&DWP(0,"esi"));
364 &mov ($AH[1],&DWP(4,"esi"));
368 &mov (&DWP(4,"esp"),$AH[1]);
369 &xor ($AH[1],"ecx"); # magic
441 &mov ($t1,$AH[0]);
445 &mov ($t2,$AH[0]);
447 &xor ($t1,$AH[0]);
448 &mov (&off($a),$AH[0]); # save $A, modulo-scheduled
449 &xor ($AH[0],"edi"); # a ^= b, (b^c) in next round
[all …]
/external/llvm/test/CodeGen/Generic/
Di128-addsub.ll3 define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
6 %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
22 define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
25 %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
/external/mesa3d/src/mesa/x86/
Dx86_cliptest.S158 MOV_B( REGIND(EBP), AH )
207 AND_B( CL, AH )
256 MOV_B( AH, REGIND(EDX) )
327 MOV_B( REGIND(EBP), AH )
373 AND_B( CL, AH )
390 MOV_B( AH, REGIND(EDX) )
/external/llvm/test/CodeGen/Hexagon/
Dsube.ll12 define void @check_sube_subc(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
15 %tmp23 = zext i64 %AH to i128
Dadde.ll17 define void @check_adde_addc (i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
20 %tmp23 = zext i64 %AH to i128
/external/llvm/test/CodeGen/SystemZ/
Dint-add-01.ll6 ; Check the low end of the AH range.
17 ; Check the high end of the aligned AH range.
29 ; Check the next halfword up, which should use AHY instead of AH.
105 ; Check that AH allows an index.
/external/llvm/test/CodeGen/X86/
Dcrash-O0.ll7 ; The DIV8 instruction produces results in AH and AL, but we don't want to use
8 ; AH in 64-bit mode. The hack used must not generate copyFromReg nodes for
D2010-02-23-DIV8rDefinesAX.ll4 ; This test produces a DIV8r instruction and uses %AX instead of %AH and %AL.
D2010-03-04-Mul8Bug.ll5 ; from the AX register instead of AH/AL. That confuses live interval analysis.
/external/libpcap/
Dtokdefs.h114 AH = 324, enumerator
236 #define AH 324 macro
Dgrammar.y300 %token IPV6 ICMPV6 AH ESP
494 | AH { $$ = Q_AH; }
/external/pcre/dist/
Dmakevp.bat1 :: AH 20-12-06 modified for new PCRE-7.0 and VP/BCC
7 :: AH 27.08.08 updated for new PCRE-7.7
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td55 def AH : X86Reg<"ah", 4>;
78 def AX : X86Reg<"ax", 0, [AL,AH]>;
323 // FIXME: Allow AH, CH, DH, BH to be used as general-purpose registers in
329 (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL,
331 let AltOrders = [(sub GR8, AH, BH, CH, DH)];
370 def GR8_ABCD_H : RegisterClass<"X86", [i8], 8, (add AH, CH, DH, BH)>;
382 (add AL, CL, DL, AH, CH, DH, BL, BH)> {
383 let AltOrders = [(sub GR8_NOREX, AH, BH, CH, DH)];
DX86RegisterInfo.cpp650 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
651 return X86::AH; in getX86SubSuperRegisterOrZero()
662 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
699 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
735 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
771 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
DREADME-X86-64.txt44 It's not possible to reference AH, BH, CH, and DH registers in an instruction
45 requiring REX prefix. However, divb and mulb both produce results in AH. If isel
DX86InstrArithmetic.td59 // AL,AH = AL*GR8
84 // AL,AH = AL*[mem8]
111 // AL,AH = AL*GR8
129 // AL,AH = AL*[mem8]
297 let Defs = [AL,AH,EFLAGS], Uses = [AX] in
298 def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
313 let Defs = [AL,AH,EFLAGS], Uses = [AX] in
314 def DIV8m : I<0xF6, MRM6m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH
334 let Defs = [AL,AH,EFLAGS], Uses = [AX] in
335 def IDIV8r : I<0xF6, MRM7r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
[all …]
/external/lzma/Asm/x86/
D7zAsm.asm60 x0_H equ AH
/external/clang/include/clang/Sema/
DLookup.h225 void setAllowHidden(bool AH) { in setAllowHidden() argument
226 AllowHidden = AH; in setAllowHidden()
/external/google-breakpad/src/common/windows/
Domap_unittest.cc322 AddressRange AH(0, H.end()); in TEST_F() local
323 MapAddressRange(image_map, AH, &mapped_ranges); in TEST_F()
/external/iptables/extensions/
Dlibxt_HMARK.man19 meaning Security Parameter Index (AH, ESP), and
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/en-GB/
Den-GB_kh0_kdt_mgc1.pkb49 AH�ڞ�
/external/ImageMagick/PerlMagick/t/reference/write/filter/
DReduceNoise.miff43 …AH�AH�BK�DT�D\�Dh�Dk�Gn�Jo�Jn�Gk�Gb�TT]\v\��d������������������t�tWgL::4893892==6D@9FA:HC:JE:MH:…
DMedianFilter.miff43 …AH�AH�BK�DT�D\�Dh�Dk�Gn�Jo�Jn�Gk�Gb�TT]\v\��d������������������t�tWgL::4893892==6D@9FA:HC:JE:MH:…
/external/llvm/lib/Transforms/Scalar/
DRewriteStatepointsForGC.cpp2493 static void RemoveNonValidAttrAtIndex(LLVMContext &Ctx, AttrHolder &AH, in RemoveNonValidAttrAtIndex() argument
2496 if (AH.getDereferenceableBytes(Index)) in RemoveNonValidAttrAtIndex()
2498 AH.getDereferenceableBytes(Index))); in RemoveNonValidAttrAtIndex()
2499 if (AH.getDereferenceableOrNullBytes(Index)) in RemoveNonValidAttrAtIndex()
2501 AH.getDereferenceableOrNullBytes(Index))); in RemoveNonValidAttrAtIndex()
2502 if (AH.doesNotAlias(Index)) in RemoveNonValidAttrAtIndex()
2506 AH.setAttributes(AH.getAttributes().removeAttributes( in RemoveNonValidAttrAtIndex()

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