| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 342 CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 319 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; in getOperationName()
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| D | LegalizeVectorOps.cpp | 288 case ISD::CTTZ_ZERO_UNDEF: in LegalizeOp()
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| D | LegalizeIntegerTypes.cpp | 65 case ISD::CTTZ_ZERO_UNDEF: in PromoteIntegerResult()
1315 case ISD::CTTZ_ZERO_UNDEF: in ExpandIntegerResult()
1951 SDValue LoLZ = DAG.getNode(ISD::CTTZ_ZERO_UNDEF, dl, NVT, Lo); in ExpandIntRes_CTTZ()
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| D | LegalizeDAG.cpp | 2964 case ISD::CTTZ_ZERO_UNDEF: in ExpandBitCount()
2998 case ISD::CTTZ_ZERO_UNDEF: in ExpandNode()
4230 case ISD::CTTZ_ZERO_UNDEF: in PromoteNode()
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| D | LegalizeVectorTypes.cpp | 76 case ISD::CTTZ_ZERO_UNDEF: in ScalarizeVectorResult()
630 case ISD::CTTZ_ZERO_UNDEF: in SplitVectorResult()
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| D | SelectionDAG.cpp | 2270 case ISD::CTTZ_ZERO_UNDEF: in computeKnownBits()
2912 case ISD::CTTZ_ZERO_UNDEF: in getNode()
3002 case ISD::CTTZ_ZERO_UNDEF: in getNode()
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| D | DAGCombiner.cpp | 1394 case ISD::CTTZ_ZERO_UNDEF: return visitCTTZ_ZERO_UNDEF(N); in visit()
4964 return DAG.getNode(ISD::CTTZ_ZERO_UNDEF, SDLoc(N), VT, N0); in visitCTTZ_ZERO_UNDEF()
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| D | SelectionDAGBuilder.cpp | 4871 setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTTZ : ISD::CTTZ_ZERO_UNDEF, in visitIntrinsicCall()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 120 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8, Expand); in MSP430TargetLowering()
121 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 140 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Custom); in BPFTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 596 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v8i8, Custom); in ARMTargetLowering()
597 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v4i16, Custom); in ARMTargetLowering()
598 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v2i32, Custom); in ARMTargetLowering()
599 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v1i64, Custom); in ARMTargetLowering()
601 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v16i8, Custom); in ARMTargetLowering()
602 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v8i16, Custom); in ARMTargetLowering()
603 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v4i32, Custom); in ARMTargetLowering()
604 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v2i64, Custom); in ARMTargetLowering()
762 setOperationAction(ISD::CTTZ_ZERO_UNDEF , MVT::i32 , Expand); in ARMTargetLowering()
4363 (N->getOpcode() == ISD::CTTZ_ZERO_UNDEF)) { in LowerCTTZ()
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1673 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8, Promote); in HexagonTargetLowering()
1674 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Promote); in HexagonTargetLowering()
1755 ISD::CTTZ_ZERO_UNDEF, in HexagonTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 337 setOperationAction(ISD::CTTZ_ZERO_UNDEF , MVT::i8 , Promote); in X86TargetLowering()
338 AddPromotedToType (ISD::CTTZ_ZERO_UNDEF , MVT::i8 , MVT::i32); in X86TargetLowering()
340 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16 , Expand); in X86TargetLowering()
341 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32 , Expand); in X86TargetLowering()
343 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); in X86TargetLowering()
727 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); in X86TargetLowering()
871 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v16i8, Custom); in X86TargetLowering()
872 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v8i16, Custom); in X86TargetLowering()
873 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v4i32, Custom); in X86TargetLowering()
1158 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v32i8, Custom); in X86TargetLowering()
[all …]
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 266 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand); in NVPTXTargetLowering()
267 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in NVPTXTargetLowering()
268 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); in NVPTXTargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 289 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in AMDGPUTargetLowering()
330 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); in AMDGPUTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1577 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); in SparcTargetLowering()
1632 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 187 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); in SystemZTargetLowering()
313 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Custom); in SystemZTargetLowering()
4354 case ISD::CTTZ_ZERO_UNDEF: in LowerOperation()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 406 def cttz_zero_undef : SDNode<"ISD::CTTZ_ZERO_UNDEF", SDTIntUnaryOp>;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 344 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in MipsTargetLowering()
345 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); in MipsTargetLowering()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 113 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in XCoreTargetLowering()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 210 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in PPCTargetLowering()
214 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); in PPCTargetLowering()
484 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 230 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in AArch64TargetLowering()
232 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); in AArch64TargetLowering()
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