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1 //===-- AMDILDevice.cpp - Base class for AMDIL Devices --------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //==-----------------------------------------------------------------------===//
9 #include "AMDILDevice.h"
10 #include "AMDGPUSubtarget.h"
11 
12 using namespace llvm;
13 // Default implementation for all of the classes.
AMDGPUDevice(AMDGPUSubtarget * ST)14 AMDGPUDevice::AMDGPUDevice(AMDGPUSubtarget *ST) : mSTM(ST)
15 {
16   mHWBits.resize(AMDGPUDeviceInfo::MaxNumberCapabilities);
17   mSWBits.resize(AMDGPUDeviceInfo::MaxNumberCapabilities);
18   setCaps();
19   mDeviceFlag = OCL_DEVICE_ALL;
20 }
21 
~AMDGPUDevice()22 AMDGPUDevice::~AMDGPUDevice()
23 {
24     mHWBits.clear();
25     mSWBits.clear();
26 }
27 
getMaxGDSSize() const28 size_t AMDGPUDevice::getMaxGDSSize() const
29 {
30   return 0;
31 }
32 
33 uint32_t
getDeviceFlag() const34 AMDGPUDevice::getDeviceFlag() const
35 {
36   return mDeviceFlag;
37 }
38 
getMaxNumCBs() const39 size_t AMDGPUDevice::getMaxNumCBs() const
40 {
41   if (usesHardware(AMDGPUDeviceInfo::ConstantMem)) {
42     return HW_MAX_NUM_CB;
43   }
44 
45   return 0;
46 }
47 
getMaxCBSize() const48 size_t AMDGPUDevice::getMaxCBSize() const
49 {
50   if (usesHardware(AMDGPUDeviceInfo::ConstantMem)) {
51     return MAX_CB_SIZE;
52   }
53 
54   return 0;
55 }
56 
getMaxScratchSize() const57 size_t AMDGPUDevice::getMaxScratchSize() const
58 {
59   return 65536;
60 }
61 
getStackAlignment() const62 uint32_t AMDGPUDevice::getStackAlignment() const
63 {
64   return 16;
65 }
66 
setCaps()67 void AMDGPUDevice::setCaps()
68 {
69   mSWBits.set(AMDGPUDeviceInfo::HalfOps);
70   mSWBits.set(AMDGPUDeviceInfo::ByteOps);
71   mSWBits.set(AMDGPUDeviceInfo::ShortOps);
72   mSWBits.set(AMDGPUDeviceInfo::HW64BitDivMod);
73   if (mSTM->isOverride(AMDGPUDeviceInfo::NoInline)) {
74     mSWBits.set(AMDGPUDeviceInfo::NoInline);
75   }
76   if (mSTM->isOverride(AMDGPUDeviceInfo::MacroDB)) {
77     mSWBits.set(AMDGPUDeviceInfo::MacroDB);
78   }
79   if (mSTM->isOverride(AMDGPUDeviceInfo::Debug)) {
80     mSWBits.set(AMDGPUDeviceInfo::ConstantMem);
81   } else {
82     mHWBits.set(AMDGPUDeviceInfo::ConstantMem);
83   }
84   if (mSTM->isOverride(AMDGPUDeviceInfo::Debug)) {
85     mSWBits.set(AMDGPUDeviceInfo::PrivateMem);
86   } else {
87     mHWBits.set(AMDGPUDeviceInfo::PrivateMem);
88   }
89   if (mSTM->isOverride(AMDGPUDeviceInfo::BarrierDetect)) {
90     mSWBits.set(AMDGPUDeviceInfo::BarrierDetect);
91   }
92   mSWBits.set(AMDGPUDeviceInfo::ByteLDSOps);
93   mSWBits.set(AMDGPUDeviceInfo::LongOps);
94 }
95 
96 AMDGPUDeviceInfo::ExecutionMode
getExecutionMode(AMDGPUDeviceInfo::Caps Caps) const97 AMDGPUDevice::getExecutionMode(AMDGPUDeviceInfo::Caps Caps) const
98 {
99   if (mHWBits[Caps]) {
100     assert(!mSWBits[Caps] && "Cannot set both SW and HW caps");
101     return AMDGPUDeviceInfo::Hardware;
102   }
103 
104   if (mSWBits[Caps]) {
105     assert(!mHWBits[Caps] && "Cannot set both SW and HW caps");
106     return AMDGPUDeviceInfo::Software;
107   }
108 
109   return AMDGPUDeviceInfo::Unsupported;
110 
111 }
112 
isSupported(AMDGPUDeviceInfo::Caps Mode) const113 bool AMDGPUDevice::isSupported(AMDGPUDeviceInfo::Caps Mode) const
114 {
115   return getExecutionMode(Mode) != AMDGPUDeviceInfo::Unsupported;
116 }
117 
usesHardware(AMDGPUDeviceInfo::Caps Mode) const118 bool AMDGPUDevice::usesHardware(AMDGPUDeviceInfo::Caps Mode) const
119 {
120   return getExecutionMode(Mode) == AMDGPUDeviceInfo::Hardware;
121 }
122 
usesSoftware(AMDGPUDeviceInfo::Caps Mode) const123 bool AMDGPUDevice::usesSoftware(AMDGPUDeviceInfo::Caps Mode) const
124 {
125   return getExecutionMode(Mode) == AMDGPUDeviceInfo::Software;
126 }
127 
128 std::string
getDataLayout() const129 AMDGPUDevice::getDataLayout() const
130 {
131     return std::string("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16"
132       "-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32"
133       "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64"
134       "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
135       "-v512:512:512-v1024:1024:1024-v2048:2048:2048"
136       "-n8:16:32:64");
137 }
138