Lines Matching refs:NewMI
710 MachineInstr *NewMI = in removeCopyByCommutingDef() local
712 if (!NewMI) in removeCopyByCommutingDef()
718 if (NewMI != DefMI) { in removeCopyByCommutingDef()
719 LIS->ReplaceMachineInstrInMaps(DefMI, NewMI); in removeCopyByCommutingDef()
721 MBB->insert(Pos, NewMI); in removeCopyByCommutingDef()
946 MachineInstr *NewMI = std::prev(MII); in reMaterializeTrivialDef() local
955 MachineOperand &DefMO = NewMI->getOperand(0); in reMaterializeTrivialDef()
970 LIS->ReplaceMachineInstrInMaps(CopyMI, NewMI); in reMaterializeTrivialDef()
978 for (unsigned i = NewMI->getDesc().getNumOperands(), in reMaterializeTrivialDef()
979 e = NewMI->getNumOperands(); i != e; ++i) { in reMaterializeTrivialDef()
980 MachineOperand &MO = NewMI->getOperand(i); in reMaterializeTrivialDef()
989 unsigned NewIdx = NewMI->getOperand(0).getSubReg(); in reMaterializeTrivialDef()
1001 NewMI->getOperand(0).setSubReg(NewIdx); in reMaterializeTrivialDef()
1002 } else if (NewMI->getOperand(0).getReg() != CopyDstReg) { in reMaterializeTrivialDef()
1007 NewMI->getOperand(0).setIsDead(true); in reMaterializeTrivialDef()
1008 NewMI->addOperand(MachineOperand::CreateReg(CopyDstReg, in reMaterializeTrivialDef()
1028 SlotIndex NewMIIdx = LIS->getInstructionIndex(NewMI); in reMaterializeTrivialDef()
1029 for (MCRegUnitIterator Units(NewMI->getOperand(0).getReg(), TRI); in reMaterializeTrivialDef()
1035 if (NewMI->getOperand(0).getSubReg()) in reMaterializeTrivialDef()
1036 NewMI->getOperand(0).setIsUndef(); in reMaterializeTrivialDef()
1047 NewMI->addOperand(MO); in reMaterializeTrivialDef()
1052 SlotIndex NewMIIdx = LIS->getInstructionIndex(NewMI); in reMaterializeTrivialDef()
1060 DEBUG(dbgs() << "Remat: " << *NewMI); in reMaterializeTrivialDef()