630       if (InOp.getOpcode() == ISD::SRL &&  in SimplifyDemandedBits()
638             Opc = ISD::SRL;  in SimplifyDemandedBits()
678             InnerOp.getOpcode() == ISD::SRL &&  in SimplifyDemandedBits()
705   case ISD::SRL:  in SimplifyDemandedBits()
730           unsigned Opc = ISD::SRL;  in SimplifyDemandedBits()
763                            TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),  in SimplifyDemandedBits()
803                              TLO.DAG.getNode(ISD::SRL, dl, VT, Op.getOperand(0),  in SimplifyDemandedBits()
813         return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,  in SimplifyDemandedBits()
1011       case ISD::SRL:  in SimplifyDemandedBits()
1015             !isTypeDesirableForOp(ISD::SRL, Op.getValueType()))  in SimplifyDemandedBits()
1039           return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl,  in SimplifyDemandedBits()
1183   if (Val.getOpcode() == ISD::SRL)  in ValueHasExactlyOneBitSet()
1292     if (N0.getOpcode() == ISD::SRL && (C1 == 0 || C1 == 1) &&  in SimplifySetCC()
1722                               DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,  in SimplifySetCC()
1731                                DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,  in SimplifySetCC()
1754             SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0.getOperand(0),  in SimplifySetCC()
1786           SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0,  in SimplifySetCC()
2796       DAG.getNode(ISD::SRL, dl, VT, Q,  in BuildSDIV()
2832         ISD::SRL, dl, VT, Q,  in BuildUDIV()
2859         ISD::SRL, dl, VT, Q,  in BuildUDIV()
2865         ISD::SRL, dl, VT, NPQ,  in BuildUDIV()
2871         ISD::SRL, dl, VT, NPQ,  in BuildUDIV()
2957         isOperationLegalOrCustom(ISD::SRL, VT) &&  in expandMUL()
2962       LH = DAG.getNode(ISD::SRL, dl, VT, N->getOperand(0), Shift);  in expandMUL()
2964       RH = DAG.getNode(ISD::SRL, dl, VT, N->getOperand(1), Shift);  in expandMUL()
3023       ISD::SRL, dl, IntVT, DAG.getNode(ISD::AND, dl, IntVT, Bits, ExponentMask),  in expandFP_TO_SINT()
3044       DAG.getNode(ISD::SRL, dl, NVT, R,  in expandFP_TO_SINT()