115   bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
119                           unsigned RegA, unsigned RegB, unsigned Dist);
534 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {  in regsAreCompatible()  argument
535   if (RegA == RegB)  in regsAreCompatible()
537   if (!RegA || !RegB)  in regsAreCompatible()
539   return TRI->regsOverlap(RegA, RegB);  in regsAreCompatible()
675 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){  in isProfitableToConv3Addr()  argument
682   unsigned FromRegB = getMappedReg(RegB, SrcRegMap);  in isProfitableToConv3Addr()
694                                               unsigned RegA, unsigned RegB,  in convertInstTo3Addr()  argument
711   if (NewMI->findRegisterUseOperand(RegB, false, TRI))  in convertInstTo3Addr()
715     Sunk = sink3AddrInstruction(NewMI, RegB, mi);  in convertInstTo3Addr()
727   DstRegMap.erase(RegB);  in convertInstTo3Addr()
1461   unsigned RegB = 0;  in processTiedPairs()  local
1472     RegB = MI->getOperand(SrcIdx).getReg();  in processTiedPairs()
1475     if (RegA == RegB) {  in processTiedPairs()
1484     assert(TargetRegisterInfo::isVirtualRegister(RegB) &&  in processTiedPairs()
1502     MIB.addReg(RegB, 0, SubRegB);  in processTiedPairs()
1503     const TargetRegisterClass *RC = MRI->getRegClass(RegB);  in processTiedPairs()
1513         assert(TRI->getMatchingSuperReg(RegA, SubRegB, MRI->getRegClass(RegB))  in processTiedPairs()
1539     assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() &&  in processTiedPairs()
1548         TargetRegisterInfo::isVirtualRegister(RegB))  in processTiedPairs()
1557     SrcRegMap[RegA] = RegB;  in processTiedPairs()
1564         if (MO.isReg() && MO.getReg() == RegB && MO.getSubReg() == SubRegB &&  in processTiedPairs()
1577     if (RemovedKillFlag && LV && LV->getVarInfo(RegB).removeKill(MI)) {  in processTiedPairs()
1580       LV->addVirtualRegisterKilled(RegB, PrevMI);  in processTiedPairs()
1585       LiveInterval &LI = LIS->getInterval(RegB);  in processTiedPairs()
1601       if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) {  in processTiedPairs()