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Lines Matching refs:SelectionDAG

35                                    SelectionDAG &DAG) const;
36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
39 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
42 SDValue MergeVectorStore(const SDValue &Op, SelectionDAG &DAG) const;
46 SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerFCEIL(SDValue Op, SelectionDAG &DAG) const;
48 SDValue LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerFRINT(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const;
52 SDValue LowerFROUND32(SDValue Op, SelectionDAG &DAG) const;
53 SDValue LowerFROUND64(SDValue Op, SelectionDAG &DAG) const;
54 SDValue LowerFROUND(SDValue Op, SelectionDAG &DAG) const;
55 SDValue LowerFFLOOR(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerINT_TO_FP64(SDValue Op, SelectionDAG &DAG, bool Signed) const;
58 SDValue LowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
59 SDValue LowerSINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
61 SDValue LowerFP64_TO_INT(SDValue Op, SelectionDAG &DAG, bool Signed) const;
62 SDValue LowerFP_TO_UINT(SDValue Op, SelectionDAG &DAG) const;
63 SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const;
65 SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
76 SelectionDAG &DAG) const;
79 SDValue ScalarizeVectorLoad(SDValue Op, SelectionDAG &DAG) const;
82 SDValue SplitVectorLoad(SDValue Op, SelectionDAG &DAG) const;
85 SDValue ScalarizeVectorStore(SDValue Op, SelectionDAG &DAG) const;
88 SDValue SplitVectorStore(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
91 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
92 SDValue LowerSDIVREM(SDValue Op, SelectionDAG &DAG) const;
93 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
94 SDValue LowerDIVREM24(SDValue Op, SelectionDAG &DAG, bool sign) const;
95 void LowerUDIVREM64(SDValue Op, SelectionDAG &DAG,
106 void getOriginalFunctionArgs(SelectionDAG &DAG,
149 SDLoc DL, SelectionDAG &DAG) const override;
154 SelectionDAG &DAG) const;
156 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
160 SelectionDAG &DAG) const override;
162 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
163 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
184 SelectionDAG &DAG) const { in PostISelFolding()
194 const SelectionDAG &DAG,
197 unsigned ComputeNumSignBitsForTargetNode(SDValue Op, const SelectionDAG &DAG,
204 virtual SDValue CreateLiveInRegister(SelectionDAG &DAG,