Lines Matching refs:ARM
162 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tBX) in runOnMachineFunction()
186 if(ARM::GPRPairRegClass.contains(Reg)) { in printOperand()
189 Reg = TRI->getSubReg(Reg, ARM::gsub_0); in printOperand()
272 if (!ARM::DPRRegClass.contains(*SR)) in PrintAsmOperand()
274 bool Lane0 = TRI->getSubReg(*SR, ARM::ssub_0) == Reg; in PrintAsmOperand()
299 if (ARM::GPRPairRegClass.contains(RegBegin)) { in PrintAsmOperand()
301 unsigned Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0); in PrintAsmOperand()
303 RegBegin = TRI->getSubReg(RegBegin, ARM::gsub_1); in PrintAsmOperand()
350 if (RC == ARM::GPRPairRegClassID) { in PrintAsmOperand()
358 ARM::gsub_0 : ARM::gsub_1); in PrintAsmOperand()
380 if (!ARM::QPRRegClass.contains(Reg)) in PrintAsmOperand()
384 ARM::dsub_0 : ARM::dsub_1); in PrintAsmOperand()
399 if(!ARM::GPRPairRegClass.contains(Reg)) in PrintAsmOperand()
401 Reg = TRI->getSubReg(Reg, ARM::gsub_1); in PrintAsmOperand()
438 return STI.getFeatureBits()[ARM::ModeThumb]; in isThumb()
621 ATS.emitArchExtension(ARM::AEK_HWDIV | ARM::AEK_HWDIVARM); in emitAttributes()
658 ATS.emitFPU(ARM::FK_CRYPTO_NEON_FP_ARMV8); in emitAttributes()
660 ATS.emitFPU(ARM::FK_NEON_FP_ARMV8); in emitAttributes()
662 ATS.emitFPU(ARM::FK_NEON_VFPV4); in emitAttributes()
664 ATS.emitFPU(STI.hasFP16() ? ARM::FK_NEON_FP16 : ARM::FK_NEON); in emitAttributes()
675 ? (STI.isFPOnlySP() ? ARM::FK_FPV5_SP_D16 : ARM::FK_FPV5_D16) in emitAttributes()
676 : ARM::FK_FP_ARMV8); in emitAttributes()
679 ? (STI.isFPOnlySP() ? ARM::FK_FPV4_SP_D16 : ARM::FK_VFPV4_D16) in emitAttributes()
680 : ARM::FK_VFPV4); in emitAttributes()
685 ? (STI.hasFP16() ? ARM::FK_VFPV3XD_FP16 : ARM::FK_VFPV3XD) in emitAttributes()
686 : (STI.hasFP16() ? ARM::FK_VFPV3_D16_FP16 : ARM::FK_VFPV3_D16)) in emitAttributes()
688 : (STI.hasFP16() ? ARM::FK_VFPV3_FP16 : ARM::FK_VFPV3)); in emitAttributes()
690 ATS.emitFPU(ARM::FK_VFPV2); in emitAttributes()
1026 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::t2B) in EmitJumpTableInsts()
1097 if (Opc == ARM::tPUSH || Opc == ARM::tLDRpci) { in EmitUnwindingInstruction()
1103 SrcReg = DstReg = ARM::SP; in EmitUnwindingInstruction()
1112 assert(DstReg == ARM::SP && in EmitUnwindingInstruction()
1125 case ARM::tPUSH: in EmitUnwindingInstruction()
1128 case ARM::STMDB_UPD: in EmitUnwindingInstruction()
1129 case ARM::t2STMDB_UPD: in EmitUnwindingInstruction()
1130 case ARM::VSTMDDB_UPD: in EmitUnwindingInstruction()
1131 assert(SrcReg == ARM::SP && in EmitUnwindingInstruction()
1143 case ARM::STR_PRE_IMM: in EmitUnwindingInstruction()
1144 case ARM::STR_PRE_REG: in EmitUnwindingInstruction()
1145 case ARM::t2STR_PRE: in EmitUnwindingInstruction()
1146 assert(MI->getOperand(2).getReg() == ARM::SP && in EmitUnwindingInstruction()
1151 if (MAI->getExceptionHandlingType() == ExceptionHandling::ARM) in EmitUnwindingInstruction()
1152 ATS.emitRegSave(RegList, Opc == ARM::VSTMDDB_UPD); in EmitUnwindingInstruction()
1155 if (SrcReg == ARM::SP) { in EmitUnwindingInstruction()
1161 case ARM::MOVr: in EmitUnwindingInstruction()
1162 case ARM::tMOVr: in EmitUnwindingInstruction()
1165 case ARM::ADDri: in EmitUnwindingInstruction()
1166 case ARM::t2ADDri: in EmitUnwindingInstruction()
1169 case ARM::SUBri: in EmitUnwindingInstruction()
1170 case ARM::t2SUBri: in EmitUnwindingInstruction()
1173 case ARM::tSUBspi: in EmitUnwindingInstruction()
1176 case ARM::tADDspi: in EmitUnwindingInstruction()
1177 case ARM::tADDrSPi: in EmitUnwindingInstruction()
1180 case ARM::tLDRpci: { in EmitUnwindingInstruction()
1198 if (MAI->getExceptionHandlingType() == ExceptionHandling::ARM) { in EmitUnwindingInstruction()
1199 if (DstReg == FramePtr && FramePtr != ARM::SP) in EmitUnwindingInstruction()
1202 ATS.emitSetFP(FramePtr, ARM::SP, -Offset); in EmitUnwindingInstruction()
1203 else if (DstReg == ARM::SP) { in EmitUnwindingInstruction()
1213 } else if (DstReg == ARM::SP) { in EmitUnwindingInstruction()
1232 if (InConstantPool && MI->getOpcode() != ARM::CONSTPOOL_ENTRY) { in EmitInstruction()
1252 case ARM::t2MOVi32imm: llvm_unreachable("Should be lowered by thumb2it pass"); in EmitInstruction()
1253 case ARM::DBG_VALUE: llvm_unreachable("Should be handled by generic printing"); in EmitInstruction()
1254 case ARM::LEApcrel: in EmitInstruction()
1255 case ARM::tLEApcrel: in EmitInstruction()
1256 case ARM::t2LEApcrel: { in EmitInstruction()
1260 ARM::t2LEApcrel ? ARM::t2ADR in EmitInstruction()
1261 : (MI->getOpcode() == ARM::tLEApcrel ? ARM::tADR in EmitInstruction()
1262 : ARM::ADR)) in EmitInstruction()
1270 case ARM::LEApcrelJT: in EmitInstruction()
1271 case ARM::tLEApcrelJT: in EmitInstruction()
1272 case ARM::t2LEApcrelJT: { in EmitInstruction()
1276 ARM::t2LEApcrelJT ? ARM::t2ADR in EmitInstruction()
1277 : (MI->getOpcode() == ARM::tLEApcrelJT ? ARM::tADR in EmitInstruction()
1278 : ARM::ADR)) in EmitInstruction()
1288 case ARM::BX_CALL: { in EmitInstruction()
1289 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::MOVr) in EmitInstruction()
1290 .addReg(ARM::LR) in EmitInstruction()
1291 .addReg(ARM::PC) in EmitInstruction()
1298 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::BX) in EmitInstruction()
1302 case ARM::tBX_CALL: { in EmitInstruction()
1327 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tBL) in EmitInstruction()
1333 case ARM::BMOVPCRX_CALL: { in EmitInstruction()
1334 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::MOVr) in EmitInstruction()
1335 .addReg(ARM::LR) in EmitInstruction()
1336 .addReg(ARM::PC) in EmitInstruction()
1343 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::MOVr) in EmitInstruction()
1344 .addReg(ARM::PC) in EmitInstruction()
1353 case ARM::BMOVPCB_CALL: { in EmitInstruction()
1354 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::MOVr) in EmitInstruction()
1355 .addReg(ARM::LR) in EmitInstruction()
1356 .addReg(ARM::PC) in EmitInstruction()
1368 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::Bcc) in EmitInstruction()
1375 case ARM::MOVi16_ga_pcrel: in EmitInstruction()
1376 case ARM::t2MOVi16_ga_pcrel: { in EmitInstruction()
1378 TmpInst.setOpcode(Opc == ARM::MOVi16_ga_pcrel? ARM::MOVi16 : ARM::t2MOVi16); in EmitInstruction()
1390 unsigned PCAdj = (Opc == ARM::MOVi16_ga_pcrel) ? 8 : 4; in EmitInstruction()
1406 case ARM::MOVTi16_ga_pcrel: in EmitInstruction()
1407 case ARM::t2MOVTi16_ga_pcrel: { in EmitInstruction()
1409 TmpInst.setOpcode(Opc == ARM::MOVTi16_ga_pcrel in EmitInstruction()
1410 ? ARM::MOVTi16 : ARM::t2MOVTi16); in EmitInstruction()
1423 unsigned PCAdj = (Opc == ARM::MOVTi16_ga_pcrel) ? 8 : 4; in EmitInstruction()
1438 case ARM::tPICADD: { in EmitInstruction()
1450 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tADDhirr) in EmitInstruction()
1453 .addReg(ARM::PC) in EmitInstruction()
1459 case ARM::PICADD: { in EmitInstruction()
1471 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDrr) in EmitInstruction()
1473 .addReg(ARM::PC) in EmitInstruction()
1482 case ARM::PICSTR: in EmitInstruction()
1483 case ARM::PICSTRB: in EmitInstruction()
1484 case ARM::PICSTRH: in EmitInstruction()
1485 case ARM::PICLDR: in EmitInstruction()
1486 case ARM::PICLDRB: in EmitInstruction()
1487 case ARM::PICLDRH: in EmitInstruction()
1488 case ARM::PICLDRSB: in EmitInstruction()
1489 case ARM::PICLDRSH: { in EmitInstruction()
1506 case ARM::PICSTR: Opcode = ARM::STRrs; break; in EmitInstruction()
1507 case ARM::PICSTRB: Opcode = ARM::STRBrs; break; in EmitInstruction()
1508 case ARM::PICSTRH: Opcode = ARM::STRH; break; in EmitInstruction()
1509 case ARM::PICLDR: Opcode = ARM::LDRrs; break; in EmitInstruction()
1510 case ARM::PICLDRB: Opcode = ARM::LDRBrs; break; in EmitInstruction()
1511 case ARM::PICLDRH: Opcode = ARM::LDRH; break; in EmitInstruction()
1512 case ARM::PICLDRSB: Opcode = ARM::LDRSB; break; in EmitInstruction()
1513 case ARM::PICLDRSH: Opcode = ARM::LDRSH; break; in EmitInstruction()
1517 .addReg(ARM::PC) in EmitInstruction()
1526 case ARM::CONSTPOOL_ENTRY: { in EmitInstruction()
1550 case ARM::JUMPTABLE_ADDRS: in EmitInstruction()
1553 case ARM::JUMPTABLE_INSTS: in EmitInstruction()
1556 case ARM::JUMPTABLE_TBB: in EmitInstruction()
1557 case ARM::JUMPTABLE_TBH: in EmitInstruction()
1558 EmitJumpTableTBInst(MI, MI->getOpcode() == ARM::JUMPTABLE_TBB ? 1 : 2); in EmitInstruction()
1560 case ARM::t2BR_JT: { in EmitInstruction()
1562 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tMOVr) in EmitInstruction()
1563 .addReg(ARM::PC) in EmitInstruction()
1570 case ARM::t2TBB_JT: in EmitInstruction()
1571 case ARM::t2TBH_JT: { in EmitInstruction()
1572 unsigned Opc = MI->getOpcode() == ARM::t2TBB_JT ? ARM::t2TBB : ARM::t2TBH; in EmitInstruction()
1583 case ARM::tBR_JTr: in EmitInstruction()
1584 case ARM::BR_JTr: { in EmitInstruction()
1588 unsigned Opc = MI->getOpcode() == ARM::BR_JTr ? in EmitInstruction()
1589 ARM::MOVr : ARM::tMOVr; in EmitInstruction()
1591 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
1597 if (Opc == ARM::MOVr) in EmitInstruction()
1602 case ARM::BR_JTm: { in EmitInstruction()
1608 TmpInst.setOpcode(ARM::LDRi12); in EmitInstruction()
1609 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
1613 TmpInst.setOpcode(ARM::LDRrs); in EmitInstruction()
1614 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in EmitInstruction()
1625 case ARM::BR_JTadd: { in EmitInstruction()
1628 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDrr) in EmitInstruction()
1629 .addReg(ARM::PC) in EmitInstruction()
1639 case ARM::SPACE: in EmitInstruction()
1642 case ARM::TRAP: { in EmitInstruction()
1654 case ARM::TRAPNaCl: { in EmitInstruction()
1661 case ARM::tTRAP: { in EmitInstruction()
1673 case ARM::t2Int_eh_sjlj_setjmp: in EmitInstruction()
1674 case ARM::t2Int_eh_sjlj_setjmp_nofp: in EmitInstruction()
1675 case ARM::tInt_eh_sjlj_setjmp: { in EmitInstruction()
1688 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tMOVr) in EmitInstruction()
1690 .addReg(ARM::PC) in EmitInstruction()
1695 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tADDi3) in EmitInstruction()
1698 .addReg(ARM::CPSR) in EmitInstruction()
1705 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tSTRi) in EmitInstruction()
1715 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tMOVi8) in EmitInstruction()
1716 .addReg(ARM::R0) in EmitInstruction()
1717 .addReg(ARM::CPSR) in EmitInstruction()
1724 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tB) in EmitInstruction()
1730 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tMOVi8) in EmitInstruction()
1731 .addReg(ARM::R0) in EmitInstruction()
1732 .addReg(ARM::CPSR) in EmitInstruction()
1742 case ARM::Int_eh_sjlj_setjmp_nofp: in EmitInstruction()
1743 case ARM::Int_eh_sjlj_setjmp: { in EmitInstruction()
1754 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDri) in EmitInstruction()
1756 .addReg(ARM::PC) in EmitInstruction()
1764 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::STRi12) in EmitInstruction()
1772 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::MOVi) in EmitInstruction()
1773 .addReg(ARM::R0) in EmitInstruction()
1781 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDri) in EmitInstruction()
1782 .addReg(ARM::PC) in EmitInstruction()
1783 .addReg(ARM::PC) in EmitInstruction()
1792 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::MOVi) in EmitInstruction()
1793 .addReg(ARM::R0) in EmitInstruction()
1802 case ARM::Int_eh_sjlj_longjmp: { in EmitInstruction()
1809 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::LDRi12) in EmitInstruction()
1810 .addReg(ARM::SP) in EmitInstruction()
1817 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::LDRi12) in EmitInstruction()
1825 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::LDRi12) in EmitInstruction()
1826 .addReg(ARM::R7) in EmitInstruction()
1833 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::BX) in EmitInstruction()
1840 case ARM::tInt_eh_sjlj_longjmp: { in EmitInstruction()
1848 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tLDRi) in EmitInstruction()
1858 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tMOVr) in EmitInstruction()
1859 .addReg(ARM::SP) in EmitInstruction()
1865 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tLDRi) in EmitInstruction()
1873 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tLDRi) in EmitInstruction()
1874 .addReg(ARM::R7) in EmitInstruction()
1881 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::tBX) in EmitInstruction()