Lines Matching refs:VA
1893 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1894 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
1901 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1903 } else if (VA.needsCustom()) { in ProcessCallArgs()
1905 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1907 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1943 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1944 const Value *ArgVal = Args[VA.getValNo()]; in ProcessCallArgs()
1945 unsigned Arg = ArgRegs[VA.getValNo()]; in ProcessCallArgs()
1946 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
1952 switch (VA.getLocInfo()) { in ProcessCallArgs()
1955 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1964 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1971 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg, in ProcessCallArgs()
1975 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1982 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1984 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(Arg); in ProcessCallArgs()
1985 RegArgs.push_back(VA.getLocReg()); in ProcessCallArgs()
1986 } else if (VA.needsCustom()) { in ProcessCallArgs()
1988 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
1993 assert(VA.isRegLoc() && NextVA.isRegLoc() && in ProcessCallArgs()
1997 TII.get(ARM::VMOVRRD), VA.getLocReg()) in ProcessCallArgs()
2000 RegArgs.push_back(VA.getLocReg()); in ProcessCallArgs()
2003 assert(VA.isMemLoc()); in ProcessCallArgs()
2013 Addr.Offset = VA.getLocMemOffset(); in ProcessCallArgs()
2109 CCValAssign &VA = ValLocs[0]; in SelectRet() local
2112 if (VA.getLocInfo() != CCValAssign::Full) in SelectRet()
2115 if (!VA.isRegLoc()) in SelectRet()
2118 unsigned SrcReg = Reg + VA.getValNo(); in SelectRet()
2122 MVT DestVT = VA.getValVT(); in SelectRet()
2139 unsigned DstReg = VA.getLocReg(); in SelectRet()
2148 RetRegs.push_back(VA.getLocReg()); in SelectRet()