Lines Matching refs:EvenReg

1522   unsigned EvenReg = MI->getOperand(0).getReg();  in FixInvalidRegPairOp()  local
1524   unsigned EvenRegNum = TRI->getDwarfRegNum(EvenReg, false);  in FixInvalidRegPairOp()
1529   bool Errata602117 = EvenReg == BaseReg &&  in FixInvalidRegPairOp()
1564         .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill))  in FixInvalidRegPairOp()
1571         .addReg(EvenReg,  in FixInvalidRegPairOp()
1592         (TRI->regsOverlap(EvenReg, BaseReg))) {  in FixInvalidRegPairOp()
1599                     EvenReg, EvenDeadKill, false,  in FixInvalidRegPairOp()
1603       if (OddReg == EvenReg && EvenDeadKill) {  in FixInvalidRegPairOp()
1611       if (EvenReg == BaseReg)  in FixInvalidRegPairOp()
1614                     EvenReg, EvenDeadKill, EvenUndef,  in FixInvalidRegPairOp()
1911                           unsigned &NewOpc, unsigned &EvenReg,