Lines Matching refs:ARM
51 const static MCFixupKindInfo InfosLE[ARM::NumTargetFixupKinds] = { in getFixupKindInfo()
94 const static MCFixupKindInfo InfosBE[ARM::NumTargetFixupKinds] = { in getFixupKindInfo()
161 bool HasThumb2 = STI->getFeatureBits()[ARM::FeatureThumb2]; in getRelaxedOpcode()
166 case ARM::tBcc: in getRelaxedOpcode()
167 return HasThumb2 ? (unsigned)ARM::t2Bcc : Op; in getRelaxedOpcode()
168 case ARM::tLDRpci: in getRelaxedOpcode()
169 return HasThumb2 ? (unsigned)ARM::t2LDRpci : Op; in getRelaxedOpcode()
170 case ARM::tADR: in getRelaxedOpcode()
171 return HasThumb2 ? (unsigned)ARM::t2ADR : Op; in getRelaxedOpcode()
172 case ARM::tB: in getRelaxedOpcode()
173 return HasThumb2 ? (unsigned)ARM::t2B : Op; in getRelaxedOpcode()
174 case ARM::tCBZ: in getRelaxedOpcode()
175 return ARM::tHINT; in getRelaxedOpcode()
176 case ARM::tCBNZ: in getRelaxedOpcode()
177 return ARM::tHINT; in getRelaxedOpcode()
190 case ARM::fixup_arm_thumb_br: { in reasonForFixupRelaxation()
202 case ARM::fixup_arm_thumb_bcc: { in reasonForFixupRelaxation()
214 case ARM::fixup_thumb_adr_pcrel_10: in reasonForFixupRelaxation()
215 case ARM::fixup_arm_thumb_cp: { in reasonForFixupRelaxation()
225 case ARM::fixup_arm_thumb_cb: { in reasonForFixupRelaxation()
260 if ((Inst.getOpcode() == ARM::tCBZ || Inst.getOpcode() == ARM::tCBNZ) && in relaxInstruction()
261 RelaxedOp == ARM::tHINT) { in relaxInstruction()
358 case ARM::fixup_arm_movt_hi16: in adjustFixupValue()
362 case ARM::fixup_arm_movw_lo16: { in adjustFixupValue()
370 case ARM::fixup_t2_movt_hi16: in adjustFixupValue()
374 case ARM::fixup_t2_movw_lo16: { in adjustFixupValue()
386 case ARM::fixup_arm_ldst_pcrel_12: in adjustFixupValue()
390 case ARM::fixup_t2_ldst_pcrel_12: { in adjustFixupValue()
406 if (Kind == ARM::fixup_t2_ldst_pcrel_12) in adjustFixupValue()
411 case ARM::fixup_arm_adr_pcrel_12: { in adjustFixupValue()
427 case ARM::fixup_t2_adr_pcrel_12: { in adjustFixupValue()
443 case ARM::fixup_arm_condbranch: in adjustFixupValue()
444 case ARM::fixup_arm_uncondbranch: in adjustFixupValue()
445 case ARM::fixup_arm_uncondbl: in adjustFixupValue()
446 case ARM::fixup_arm_condbl: in adjustFixupValue()
447 case ARM::fixup_arm_blx: in adjustFixupValue()
455 case ARM::fixup_t2_uncondbranch: { in adjustFixupValue()
474 case ARM::fixup_t2_condbranch: { in adjustFixupValue()
487 case ARM::fixup_arm_thumb_bl: { in adjustFixupValue()
514 case ARM::fixup_arm_thumb_blx: { in adjustFixupValue()
545 case ARM::fixup_thumb_adr_pcrel_10: in adjustFixupValue()
546 case ARM::fixup_arm_thumb_cp: in adjustFixupValue()
549 if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) { in adjustFixupValue()
558 case ARM::fixup_arm_thumb_cb: { in adjustFixupValue()
564 case ARM::fixup_arm_thumb_br: in adjustFixupValue()
566 if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2]) { in adjustFixupValue()
574 case ARM::fixup_arm_thumb_bcc: in adjustFixupValue()
576 if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2]) { in adjustFixupValue()
584 case ARM::fixup_arm_pcrel_10_unscaled: { in adjustFixupValue()
600 case ARM::fixup_arm_pcrel_10: in adjustFixupValue()
604 case ARM::fixup_t2_pcrel_10: { in adjustFixupValue()
622 if (Kind == ARM::fixup_t2_pcrel_10) in adjustFixupValue()
640 if ((unsigned)Fixup.getKind() != ARM::fixup_arm_ldst_pcrel_12 && in processFixupValue()
641 (unsigned)Fixup.getKind() != ARM::fixup_t2_ldst_pcrel_12 && in processFixupValue()
642 (unsigned)Fixup.getKind() != ARM::fixup_arm_adr_pcrel_12 && in processFixupValue()
643 (unsigned)Fixup.getKind() != ARM::fixup_thumb_adr_pcrel_10 && in processFixupValue()
644 (unsigned)Fixup.getKind() != ARM::fixup_t2_adr_pcrel_12 && in processFixupValue()
645 (unsigned)Fixup.getKind() != ARM::fixup_arm_thumb_cp) { in processFixupValue()
651 if (IsResolved && (unsigned)Fixup.getKind() == ARM::fixup_arm_thumb_bl) { in processFixupValue()
665 if (A && ((unsigned)Fixup.getKind() == ARM::fixup_arm_thumb_blx || in processFixupValue()
666 (unsigned)Fixup.getKind() == ARM::fixup_arm_blx || in processFixupValue()
667 (unsigned)Fixup.getKind() == ARM::fixup_arm_uncondbl || in processFixupValue()
668 (unsigned)Fixup.getKind() == ARM::fixup_arm_condbl)) in processFixupValue()
685 case ARM::fixup_arm_thumb_bcc: in getFixupKindNumBytes()
686 case ARM::fixup_arm_thumb_cp: in getFixupKindNumBytes()
687 case ARM::fixup_thumb_adr_pcrel_10: in getFixupKindNumBytes()
691 case ARM::fixup_arm_thumb_br: in getFixupKindNumBytes()
692 case ARM::fixup_arm_thumb_cb: in getFixupKindNumBytes()
695 case ARM::fixup_arm_pcrel_10_unscaled: in getFixupKindNumBytes()
696 case ARM::fixup_arm_ldst_pcrel_12: in getFixupKindNumBytes()
697 case ARM::fixup_arm_pcrel_10: in getFixupKindNumBytes()
698 case ARM::fixup_arm_adr_pcrel_12: in getFixupKindNumBytes()
699 case ARM::fixup_arm_uncondbl: in getFixupKindNumBytes()
700 case ARM::fixup_arm_condbl: in getFixupKindNumBytes()
701 case ARM::fixup_arm_blx: in getFixupKindNumBytes()
702 case ARM::fixup_arm_condbranch: in getFixupKindNumBytes()
703 case ARM::fixup_arm_uncondbranch: in getFixupKindNumBytes()
707 case ARM::fixup_t2_ldst_pcrel_12: in getFixupKindNumBytes()
708 case ARM::fixup_t2_condbranch: in getFixupKindNumBytes()
709 case ARM::fixup_t2_uncondbranch: in getFixupKindNumBytes()
710 case ARM::fixup_t2_pcrel_10: in getFixupKindNumBytes()
711 case ARM::fixup_t2_adr_pcrel_12: in getFixupKindNumBytes()
712 case ARM::fixup_arm_thumb_bl: in getFixupKindNumBytes()
713 case ARM::fixup_arm_thumb_blx: in getFixupKindNumBytes()
714 case ARM::fixup_arm_movt_hi16: in getFixupKindNumBytes()
715 case ARM::fixup_arm_movw_lo16: in getFixupKindNumBytes()
716 case ARM::fixup_t2_movt_hi16: in getFixupKindNumBytes()
717 case ARM::fixup_t2_movw_lo16: in getFixupKindNumBytes()
741 case ARM::fixup_arm_thumb_bcc: in getFixupKindContainerSizeBytes()
742 case ARM::fixup_arm_thumb_cp: in getFixupKindContainerSizeBytes()
743 case ARM::fixup_thumb_adr_pcrel_10: in getFixupKindContainerSizeBytes()
744 case ARM::fixup_arm_thumb_br: in getFixupKindContainerSizeBytes()
745 case ARM::fixup_arm_thumb_cb: in getFixupKindContainerSizeBytes()
749 case ARM::fixup_arm_pcrel_10_unscaled: in getFixupKindContainerSizeBytes()
750 case ARM::fixup_arm_ldst_pcrel_12: in getFixupKindContainerSizeBytes()
751 case ARM::fixup_arm_pcrel_10: in getFixupKindContainerSizeBytes()
752 case ARM::fixup_arm_adr_pcrel_12: in getFixupKindContainerSizeBytes()
753 case ARM::fixup_arm_uncondbl: in getFixupKindContainerSizeBytes()
754 case ARM::fixup_arm_condbl: in getFixupKindContainerSizeBytes()
755 case ARM::fixup_arm_blx: in getFixupKindContainerSizeBytes()
756 case ARM::fixup_arm_condbranch: in getFixupKindContainerSizeBytes()
757 case ARM::fixup_arm_uncondbranch: in getFixupKindContainerSizeBytes()
758 case ARM::fixup_t2_ldst_pcrel_12: in getFixupKindContainerSizeBytes()
759 case ARM::fixup_t2_condbranch: in getFixupKindContainerSizeBytes()
760 case ARM::fixup_t2_uncondbranch: in getFixupKindContainerSizeBytes()
761 case ARM::fixup_t2_pcrel_10: in getFixupKindContainerSizeBytes()
762 case ARM::fixup_t2_adr_pcrel_12: in getFixupKindContainerSizeBytes()
763 case ARM::fixup_arm_thumb_bl: in getFixupKindContainerSizeBytes()
764 case ARM::fixup_arm_thumb_blx: in getFixupKindContainerSizeBytes()
765 case ARM::fixup_arm_movt_hi16: in getFixupKindContainerSizeBytes()
766 case ARM::fixup_arm_movw_lo16: in getFixupKindContainerSizeBytes()
767 case ARM::fixup_t2_movt_hi16: in getFixupKindContainerSizeBytes()
768 case ARM::fixup_t2_movw_lo16: in getFixupKindContainerSizeBytes()
845 int CFARegister = ARM::SP; in generateCompactUnwindEncoding()
867 if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg)) in generateCompactUnwindEncoding()
869 else if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg)) { in generateCompactUnwindEncoding()
895 if ((CFARegister == ARM::SP) && (CFARegisterOffset == 0)) in generateCompactUnwindEncoding()
899 if (CFARegister != ARM::R7) { in generateCompactUnwindEncoding()
906 if (RegOffsets.lookup(ARM::LR) != (-4 - StackAdjust)) { in generateCompactUnwindEncoding()
915 if (RegOffsets.lookup(ARM::R7) != (-8 - StackAdjust)) { in generateCompactUnwindEncoding()
946 } GPRCSRegs[] = {{ARM::R6, CU::UNWIND_ARM_FRAME_FIRST_PUSH_R6}, in generateCompactUnwindEncoding()
947 {ARM::R5, CU::UNWIND_ARM_FRAME_FIRST_PUSH_R5}, in generateCompactUnwindEncoding()
948 {ARM::R4, CU::UNWIND_ARM_FRAME_FIRST_PUSH_R4}, in generateCompactUnwindEncoding()
949 {ARM::R12, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R12}, in generateCompactUnwindEncoding()
950 {ARM::R11, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R11}, in generateCompactUnwindEncoding()
951 {ARM::R10, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R10}, in generateCompactUnwindEncoding()
952 {ARM::R9, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R9}, in generateCompactUnwindEncoding()
953 {ARM::R8, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R8}}; in generateCompactUnwindEncoding()
993 static unsigned FPRCSRegs[] = { ARM::D8, ARM::D10, ARM::D12, ARM::D14 }; in generateCompactUnwindEncoding()
1018 unsigned AK = ARM::parseArch(Arch); in getMachOSubTypeFromArch()
1022 case ARM::AK_ARMV4T: in getMachOSubTypeFromArch()
1024 case ARM::AK_ARMV5T: in getMachOSubTypeFromArch()
1025 case ARM::AK_ARMV5TE: in getMachOSubTypeFromArch()
1026 case ARM::AK_ARMV5TEJ: in getMachOSubTypeFromArch()
1028 case ARM::AK_ARMV6: in getMachOSubTypeFromArch()
1029 case ARM::AK_ARMV6K: in getMachOSubTypeFromArch()
1031 case ARM::AK_ARMV7A: in getMachOSubTypeFromArch()
1033 case ARM::AK_ARMV7S: in getMachOSubTypeFromArch()
1035 case ARM::AK_ARMV7K: in getMachOSubTypeFromArch()
1037 case ARM::AK_ARMV6M: in getMachOSubTypeFromArch()
1039 case ARM::AK_ARMV7M: in getMachOSubTypeFromArch()
1041 case ARM::AK_ARMV7EM: in getMachOSubTypeFromArch()