Lines Matching defs:Mask
3041 SmallVector<int, 8> Mask; in getMOVL() local
3493 const uint32_t *Mask = RegInfo->getCallPreservedMask(MF, CallConv); in LowerCall() local
4210 static bool isUndefInRange(ArrayRef<int> Mask, unsigned Pos, unsigned Size) { in isUndefInRange()
4231 static bool isSequentialOrUndefInRange(ArrayRef<int> Mask, in isSequentialOrUndefInRange()
4538 SDValue Mask = DAG.getConstant(MaskVal, dl, MVT::i8); in Insert128BitVector() local
4554 SDValue Mask = DAG.getConstant(0x0f, dl, MVT::i8); in Insert128BitVector() local
4637 SmallVector<int, 64> Mask; in Insert1BitVector() local
4696 SmallVector<int, 8> Mask; in getUnpackl() local
4708 SmallVector<int, 8> Mask; in getUnpackh() local
4742 SmallVectorImpl<int> &Mask, bool &IsUnary) { in getTargetShuffleMask()
5228 int Mask[4]; in LowerBuildVectorv4x32() local
5373 SmallVector<int, 8> Mask(NumElems, EltNo); in LowerAsSplatVectorLoad() local
5705 SmallVector<int, 8> Mask(NumElems, -1); in buildFromShuffleMostly() local
6751 static bool isNoopShuffleMask(ArrayRef<int> Mask) { in isNoopShuffleMask()
6766 static bool isSingleInputShuffleMask(ArrayRef<int> Mask) { in isSingleInputShuffleMask()
6778 static bool is128BitLaneCrossingShuffleMask(MVT VT, ArrayRef<int> Mask) { in is128BitLaneCrossingShuffleMask()
6799 is128BitLaneRepeatedShuffleMask(MVT VT, ArrayRef<int> Mask, in is128BitLaneRepeatedShuffleMask()
6833 static bool isShuffleEquivalent(SDValue V1, SDValue V2, ArrayRef<int> Mask, in isShuffleEquivalent()
6866 static SDValue getV4X86ShuffleImm8ForMask(ArrayRef<int> Mask, SDLoc DL, in getV4X86ShuffleImm8ForMask()
6890 static SmallBitVector computeZeroableShuffleElements(ArrayRef<int> Mask, in computeZeroableShuffleElements()
6928 static SDValue lowerVectorShuffleWithUNPCK(SDLoc DL, MVT VT, ArrayRef<int> Mask, in lowerVectorShuffleWithUNPCK()
6966 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsBitMask()
7009 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsBitBlend()
7046 SmallVector<int, 8> Mask(Original.begin(), Original.end()); in lowerVectorShuffleAsBlend() local
7205 ArrayRef<int> Mask, in lowerVectorShuffleAsBlendAndPermute()
7240 ArrayRef<int> Mask, in lowerVectorShuffleAsDecomposedShuffleBlend()
7289 ArrayRef<int> Mask, in lowerVectorShuffleAsByteRotate()
7424 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsShift()
7492 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleWithSSE4A()
7632 ArrayRef<int> Mask, const X86Subtarget *Subtarget, SelectionDAG &DAG) { in lowerVectorShuffleAsSpecificZeroOrAnyExtend()
7789 SDLoc DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsZeroOrAnyExtend()
7948 SDLoc DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsElementInsertion()
8106 ArrayRef<int> Mask, in lowerVectorShuffleAsBroadcast()
8207 ArrayRef<int> Mask, in lowerVectorShuffleAsInsertPS()
8289 ArrayRef<int> Mask, in lowerVectorShuffleAsPermuteAndUnpack()
8409 ArrayRef<int> Mask = SVOp->getMask(); in lowerV2F64VectorShuffle() local
8490 ArrayRef<int> Mask = SVOp->getMask(); in lowerV2I64VectorShuffle() local
8592 static bool isSingleSHUFPSMask(ArrayRef<int> Mask) { in isSingleSHUFPSMask()
8612 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithSHUFPS()
8709 ArrayRef<int> Mask = SVOp->getMask(); in lowerV4F32VectorShuffle() local
8788 ArrayRef<int> Mask = SVOp->getMask(); in lowerV4I32VectorShuffle() local
8897 SDLoc DL, MVT VT, SDValue V, MutableArrayRef<int> Mask, in lowerV8I16GeneralSingleInputVectorShuffle()
9332 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsPSHUFB()
9405 MutableArrayRef<int> Mask(MaskStorage); in lowerV8I16VectorShuffle() local
9531 static int canLowerByDroppingEvenElements(ArrayRef<int> Mask) { in canLowerByDroppingEvenElements()
9593 ArrayRef<int> Mask = SVOp->getMask(); in lowerV16I8VectorShuffle() local
9634 auto canWidenViaDuplication = [](ArrayRef<int> Mask) { in lowerV16I8VectorShuffle()
9909 static bool canWidenShuffleElements(ArrayRef<int> Mask, in canWidenShuffleElements()
9961 SDValue V2, ArrayRef<int> Mask, in splitAndLowerVectorShuffle()
10092 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsSplitOrBlend()
10152 ArrayRef<int> Mask, in lowerVectorShuffleAsLanePermuteAndBlend()
10196 SDValue V2, ArrayRef<int> Mask, in lowerV2X128VectorShuffle()
10289 SDLoc DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleByMerging128BitLanes()
10364 static bool isShuffleMaskInputInPlace(int Input, ArrayRef<int> Mask) { in isShuffleMaskInputInPlace()
10375 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithSHUFPD()
10416 ArrayRef<int> Mask = SVOp->getMask(); in lowerV4F64VectorShuffle() local
10498 ArrayRef<int> Mask = SVOp->getMask(); in lowerV4I64VectorShuffle() local
10577 ArrayRef<int> Mask = SVOp->getMask(); in lowerV8F32VectorShuffle() local
10669 ArrayRef<int> Mask = SVOp->getMask(); in lowerV8I32VectorShuffle() local
10748 ArrayRef<int> Mask = SVOp->getMask(); in lowerV16I16VectorShuffle() local
10839 ArrayRef<int> Mask = SVOp->getMask(); in lowerV32I8VectorShuffle() local
10914 ArrayRef<int> Mask = SVOp->getMask(); in lower256BitVectorShuffle() local
10968 ArrayRef<int> Mask, in lowerV4X128VectorShuffle()
11002 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithPERMV()
11025 ArrayRef<int> Mask = SVOp->getMask(); in lowerV8F64VectorShuffle() local
11047 ArrayRef<int> Mask = SVOp->getMask(); in lowerV16F32VectorShuffle() local
11065 ArrayRef<int> Mask = SVOp->getMask(); in lowerV8I64VectorShuffle() local
11087 ArrayRef<int> Mask = SVOp->getMask(); in lowerV16I32VectorShuffle() local
11105 ArrayRef<int> Mask = SVOp->getMask(); in lowerV32I16VectorShuffle() local
11120 ArrayRef<int> Mask = SVOp->getMask(); in lowerV64I8VectorShuffle() local
11138 ArrayRef<int> Mask = SVOp->getMask(); in lower512BitVectorShuffle() local
11186 ArrayRef<int> Mask = SVOp->getMask(); in lower1BitVectorShuffle() local
11241 ArrayRef<int> Mask = SVOp->getMask(); in lowerVectorShuffle() local
11433 SmallVector<int, 32> Mask; in lowerVSELECTtoVectorShuffle() local
11605 SDValue Mask = DAG.getNode(X86ISD::VINSERT, dl, MaskVT, in LowerEXTRACT_VECTOR_ELT() local
11664 int Mask[4] = { static_cast<int>(Idx), -1, -1, -1 }; in LowerEXTRACT_VECTOR_ELT() local
11682 int Mask[2] = { 1, -1 }; in LowerEXTRACT_VECTOR_ELT() local
13526 SDValue Mask = in LowerFABSorFNEG() local
13891 APInt Mask = ArithOp.getOpcode() == ISD::SRL in EmitTest() local
14646 static const int Mask[] = { 1, 0, 3, 2 }; in LowerVSETCC() local
16102 static SDValue getMaskNode(SDValue Mask, MVT MaskVT, in getMaskNode()
16148 static SDValue getVectorMaskingNode(SDValue Op, SDValue Mask, in getVectorMaskingNode()
16193 static SDValue getScalarMaskingNode(SDValue Op, SDValue Mask, in getScalarMaskingNode()
16302 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
16326 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
16348 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
16356 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
16379 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
16406 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
16425 SDValue Mask = Op.getOperand(5); in LowerINTRINSIC_WO_CHAIN() local
16437 SDValue Mask = Op.getOperand(5); in LowerINTRINSIC_WO_CHAIN() local
16458 SDValue Mask = Op.getOperand(5); in LowerINTRINSIC_WO_CHAIN() local
16494 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
16516 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
16552 SDValue Mask = Op.getOperand(5); in LowerINTRINSIC_WO_CHAIN() local
16569 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
16584 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
16603 SDValue Mask = Op.getOperand((IntrData->Type == CMP_MASK_CC) ? 4 : 3); in LowerINTRINSIC_WO_CHAIN() local
16643 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
16705 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
16716 SDValue Mask = Op.getOperand(1); in LowerINTRINSIC_WO_CHAIN() local
16722 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
16950 SDValue Src, SDValue Mask, SDValue Base, in getGatherNode()
16984 SDValue Src, SDValue Mask, SDValue Base, in getScatterNode()
17014 SDValue Mask, SDValue Base, SDValue Index, in getPrefetchNode()
17167 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_TRUNCATE_TO_MEM() local
17238 SDValue Mask = Op.getOperand(5); in LowerINTRINSIC_W_CHAIN() local
17247 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_W_CHAIN() local
17260 SDValue Mask = Op.getOperand(2); in LowerINTRINSIC_W_CHAIN() local
17311 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_W_CHAIN() local
17337 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_W_CHAIN() local
18205 const int Mask[] = {1, -1, 3, -1, 5, -1, 7, -1}; in LowerMUL_LOHI() local
18407 SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, V); in LowerScalarImmediateShift() local
19544 auto GetMask = [&](SDValue V, APInt Mask) { in LowerVectorCTPOPBitmath()
19815 SDValue Mask = N->getMask(); in LowerMSCATTER() local
19895 SDValue Mask = N->getMask(); in LowerMLOAD() local
19927 SDValue Mask = N->getMask(); in LowerMSTORE() local
19955 SDValue Mask = N->getMask(); in LowerMGATHER() local
20844 X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask, in isVectorClearMaskLegal()
22749 static bool combineX86ShuffleChain(SDValue Op, SDValue Root, ArrayRef<int> Mask, in combineX86ShuffleChain()
23006 SmallVector<int, 16> Mask; in combineX86ShufflesRecursively() local
23082 SmallVector<int, 4> Mask; in getPSHUFShuffleMask() local
23123 combineRedundantDWordShuffle(SDValue N, MutableArrayRef<int> Mask, in combineRedundantDWordShuffle()
23257 static bool combineRedundantHalfShuffle(SDValue N, MutableArrayRef<int> Mask, in combineRedundantHalfShuffle()
23325 SmallVector<int, 4> Mask; in PerformTargetShuffleCombine() local
23356 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Op1.getNode())->getMask(); in PerformTargetShuffleCombine() local
23473 SmallVector<int, 8> Mask; in combineShuffleToAddSub() local
24961 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); in PerformSHLCombine() local
25316 APInt Mask = APInt::getAllOnesValue(InBits); in WidenMaskArithmetic() local
25406 SmallVector<int, 8> Mask; in VectorZextCombine() local
25483 uint64_t Mask = MaskNode->getZExtValue(); in PerformAndCombine() local
25547 SDValue Mask = N1.getOperand(0); in PerformOrCombine() local
25995 SDValue Mask = Mld->getMask(); in PerformMLOADCombine() local
26088 SDValue Mask = Mst->getMask(); in PerformMSTORECombine() local
26444 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(LHS.getNode())->getMask(); in isHorizontalBinOp() local
26462 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(RHS.getNode())->getMask(); in isHorizontalBinOp() local
27282 if (auto *Mask = dyn_cast<ConstantSDNode>(N->getOperand(2))) in PerformBLENDICombine() local
27296 SDValue Mask = N->getOperand(2); in PerformGatherScatterCombine() local