Lines Matching refs:Rs
5 define i32 @test00(i64 %Rs, i64 %Rt) #0 {
7 %0 = tail call i32 @llvm.hexagon.C2.cmpeqp(i64 %Rs, i64 %Rt)
13 define i32 @test01(i64 %Rs, i64 %Rt) #0 {
15 %0 = tail call i32 @llvm.hexagon.C2.cmpgtp(i64 %Rs, i64 %Rt)
21 define i32 @test02(i64 %Rs, i64 %Rt) #0 {
23 %0 = tail call i32 @llvm.hexagon.C2.cmpgtup(i64 %Rs, i64 %Rt)
29 define i32 @test10(i32 %Rs, i32 %Rt) #0 {
31 %0 = tail call i32 @llvm.hexagon.A4.rcmpeq(i32 %Rs, i32 %Rt)
37 define i32 @test11(i32 %Rs, i32 %Rt) #0 {
39 %0 = tail call i32 @llvm.hexagon.A4.rcmpneq(i32 %Rs, i32 %Rt)
45 define i32 @test12(i32 %Rs) #0 {
47 %0 = tail call i32 @llvm.hexagon.A4.rcmpeqi(i32 %Rs, i32 23)
53 define i32 @test13(i32 %Rs) #0 {
55 %0 = tail call i32 @llvm.hexagon.A4.rcmpneqi(i32 %Rs, i32 47)
61 define i32 @test20(i32 %Rs, i32 %Rt) #0 {
63 %0 = tail call i32 @llvm.hexagon.A4.cmpbeq(i32 %Rs, i32 %Rt)
69 define i32 @test21(i32 %Rs, i32 %Rt) #0 {
71 %0 = tail call i32 @llvm.hexagon.A4.cmpbgt(i32 %Rs, i32 %Rt)
77 define i32 @test22(i32 %Rs, i32 %Rt) #0 {
79 %0 = tail call i32 @llvm.hexagon.A4.cmpbgtu(i32 %Rs, i32 %Rt)
85 define i32 @test23(i32 %Rs) #0 {
87 %0 = tail call i32 @llvm.hexagon.A4.cmpbeqi(i32 %Rs, i32 56)
93 define i32 @test24(i32 %Rs) #0 {
95 %0 = tail call i32 @llvm.hexagon.A4.cmpbgti(i32 %Rs, i32 29)
101 define i32 @test25(i32 %Rs) #0 {
103 %0 = tail call i32 @llvm.hexagon.A4.cmpbgtui(i32 %Rs, i32 111)
109 define i32 @test30(i32 %Rs, i32 %Rt) #0 {
111 %0 = tail call i32 @llvm.hexagon.A4.cmpheq(i32 %Rs, i32 %Rt)
117 define i32 @test31(i32 %Rs, i32 %Rt) #0 {
119 %0 = tail call i32 @llvm.hexagon.A4.cmphgt(i32 %Rs, i32 %Rt)
125 define i32 @test32(i32 %Rs, i32 %Rt) #0 {
127 %0 = tail call i32 @llvm.hexagon.A4.cmphgtu(i32 %Rs, i32 %Rt)
133 define i32 @test33(i32 %Rs) #0 {
135 %0 = tail call i32 @llvm.hexagon.A4.cmpheqi(i32 %Rs, i32 -123)
141 define i32 @test34(i32 %Rs) #0 {
143 %0 = tail call i32 @llvm.hexagon.A4.cmphgti(i32 %Rs, i32 -3)
149 define i32 @test35(i32 %Rs) #0 {
151 %0 = tail call i32 @llvm.hexagon.A4.cmphgtui(i32 %Rs, i32 13)
157 define i64 @test40(i32 %Pu, i64 %Rs, i64 %Rt) #0 {
159 %0 = tail call i64 @llvm.hexagon.C2.vmux(i32 %Pu, i64 %Rs, i64 %Rt)
165 define i32 @test41(i64 %Rs, i64 %Rt) #0 {
167 %0 = tail call i32 @llvm.hexagon.A4.vcmpbeq.any(i64 %Rs, i64 %Rt)
173 define i64 @test50(i64 %Rs, i64 %Rt) #0 {
175 %0 = tail call i64 @llvm.hexagon.A2.addp(i64 %Rs, i64 %Rt)
181 define i64 @test51(i64 %Rs, i64 %Rt) #0 {
183 %0 = tail call i64 @llvm.hexagon.A2.addpsat(i64 %Rs, i64 %Rt)
189 define i64 @test52(i64 %Rs, i64 %Rt) #0 {
191 %0 = tail call i64 @llvm.hexagon.A2.subp(i64 %Rs, i64 %Rt)
197 define i64 @test53(i32 %Rs, i64 %Rt) #0 {
199 %0 = tail call i64 @llvm.hexagon.A2.addsp(i32 %Rs, i64 %Rt)
205 define i64 @test54(i64 %Rs, i64 %Rt) #0 {
207 %0 = tail call i64 @llvm.hexagon.A2.andp(i64 %Rs, i64 %Rt)
213 define i64 @test55(i64 %Rs, i64 %Rt) #0 {
215 %0 = tail call i64 @llvm.hexagon.A2.orp(i64 %Rs, i64 %Rt)
221 define i64 @test56(i64 %Rs, i64 %Rt) #0 {
223 %0 = tail call i64 @llvm.hexagon.A2.xorp(i64 %Rs, i64 %Rt)
229 define i64 @test57(i64 %Rs, i64 %Rt) #0 {
231 %0 = tail call i64 @llvm.hexagon.A4.andnp(i64 %Rs, i64 %Rt)
237 define i64 @test58(i64 %Rs, i64 %Rt) #0 {
239 %0 = tail call i64 @llvm.hexagon.A4.ornp(i64 %Rs, i64 %Rt)
245 define i32 @test60(i32 %Rs, i32 %Rt) #0 {
247 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.ll(i32 %Rs, i32 %Rt)
253 define i32 @test61(i32 %Rs, i32 %Rt) #0 {
255 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.hl(i32 %Rs, i32 %Rt)
261 define i32 @test62(i32 %Rs, i32 %Rt) #0 {
263 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 %Rs, i32 %Rt)
269 define i32 @test63(i32 %Rs, i32 %Rt) #0 {
271 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.hl(i32 %Rs, i32 %Rt)
277 define i32 @test64(i32 %Rs, i32 %Rt) #0 {
279 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.ll(i32 %Rs, i32 %Rt)
285 define i32 @test65(i32 %Rs, i32 %Rt) #0 {
287 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.lh(i32 %Rs, i32 %Rt)
293 define i32 @test66(i32 %Rs, i32 %Rt) #0 {
295 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.hl(i32 %Rs, i32 %Rt)
301 define i32 @test67(i32 %Rs, i32 %Rt) #0 {
303 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.hh(i32 %Rs, i32 %Rt)
309 define i32 @test68(i32 %Rs, i32 %Rt) #0 {
311 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.sat.ll(i32 %Rs, i32 %Rt)
317 define i32 @test69(i32 %Rs, i32 %Rt) #0 {
319 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.sat.lh(i32 %Rs, i32 %Rt)
325 define i32 @test6A(i32 %Rs, i32 %Rt) #0 {
327 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.sat.hl(i32 %Rs, i32 %Rt)
333 define i32 @test6B(i32 %Rs, i32 %Rt) #0 {
335 %0 = tail call i32 @llvm.hexagon.A2.addh.h16.sat.hh(i32 %Rs, i32 %Rt)
341 define i32 @test70(i32 %Rs, i32 %Rt) #0 {
343 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.ll(i32 %Rs, i32 %Rt)
349 define i32 @test71(i32 %Rs, i32 %Rt) #0 {
351 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.hl(i32 %Rs, i32 %Rt)
357 define i32 @test72(i32 %Rs, i32 %Rt) #0 {
359 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %Rs, i32 %Rt)
365 define i32 @test73(i32 %Rs, i32 %Rt) #0 {
367 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.hl(i32 %Rs, i32 %Rt)
373 define i32 @test74(i32 %Rs, i32 %Rt) #0 {
375 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.ll(i32 %Rs, i32 %Rt)
381 define i32 @test75(i32 %Rs, i32 %Rt) #0 {
383 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.lh(i32 %Rs, i32 %Rt)
389 define i32 @test76(i32 %Rs, i32 %Rt) #0 {
391 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.hl(i32 %Rs, i32 %Rt)
397 define i32 @test77(i32 %Rs, i32 %Rt) #0 {
399 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.hh(i32 %Rs, i32 %Rt)
405 define i32 @test78(i32 %Rs, i32 %Rt) #0 {
407 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.sat.ll(i32 %Rs, i32 %Rt)
413 define i32 @test79(i32 %Rs, i32 %Rt) #0 {
415 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.sat.lh(i32 %Rs, i32 %Rt)
421 define i32 @test7A(i32 %Rs, i32 %Rt) #0 {
423 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.sat.hl(i32 %Rs, i32 %Rt)
429 define i32 @test7B(i32 %Rs, i32 %Rt) #0 {
431 %0 = tail call i32 @llvm.hexagon.A2.subh.h16.sat.hh(i32 %Rs, i32 %Rt)
437 define i32 @test90(i32 %Rs) #0 {
439 %0 = tail call i32 @llvm.hexagon.S4.andi.asl.ri(i32 1, i32 %Rs, i32 2)
445 define i32 @test91(i32 %Rs) #0 {
447 %0 = tail call i32 @llvm.hexagon.S4.ori.asl.ri(i32 1, i32 %Rs, i32 2)
453 define i32 @test92(i32 %Rs) #0 {
455 %0 = tail call i32 @llvm.hexagon.S4.addi.asl.ri(i32 1, i32 %Rs, i32 2)
461 define i32 @test93(i32 %Rs) #0 {
463 %0 = tail call i32 @llvm.hexagon.S4.subi.asl.ri(i32 1, i32 %Rs, i32 2)
469 define i32 @test94(i32 %Rs) #0 {
471 %0 = tail call i32 @llvm.hexagon.S4.andi.lsr.ri(i32 1, i32 %Rs, i32 2)
477 define i32 @test95(i32 %Rs) #0 {
479 %0 = tail call i32 @llvm.hexagon.S4.ori.lsr.ri(i32 1, i32 %Rs, i32 2)
485 define i32 @test96(i32 %Rs) #0 {
487 %0 = tail call i32 @llvm.hexagon.S4.addi.lsr.ri(i32 1, i32 %Rs, i32 2)
493 define i32 @test97(i32 %Rs) #0 {
495 %0 = tail call i32 @llvm.hexagon.S4.subi.lsr.ri(i32 1, i32 %Rs, i32 2)
501 define i64 @test100(i32 %Rs, i32 %Rt) #0 {
503 %0 = tail call i64 @llvm.hexagon.A4.bitsplit(i32 %Rs, i32 %Rt)
509 define i32 @test101(i32 %Rs, i32 %Rt) #0 {
511 %0 = tail call i32 @llvm.hexagon.A4.modwrapu(i32 %Rs, i32 %Rt)
517 define i32 @test102(i64 %Rs, i64 %Rt) #0 {
519 %0 = tail call i32 @llvm.hexagon.S2.parityp(i64 %Rs, i64 %Rt)
525 define i32 @test103(i32 %Rs, i32 %Rt) #0 {
527 %0 = tail call i32 @llvm.hexagon.S4.parity(i32 %Rs, i32 %Rt)