17     register uint32_t t0, t1, t2, t3, t4, t5, t6;  in S32_D565_Blend_mips_dsp()  local
88               [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6), [s0]"=&r"(s0),  in S32_D565_Blend_mips_dsp()
121     register int32_t t0, t1, t2, t3, t4, t5, t6;  in S32A_D565_Opaque_Dither_mips_dsp()  local
232               [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6), [t7]"=&r"(t7),  in S32A_D565_Opaque_Dither_mips_dsp()
270     register uint32_t t6, t7, t8, t9, s0;  in S32_D565_Opaque_Dither_mips_dsp()  local
360           [t3]"=&r"(t3), [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6),  in S32_D565_Opaque_Dither_mips_dsp()
378     register int32_t t0, t1, t2, t3, t4, t5, t6;  in S32_D565_Blend_Dither_mips_dsp()  local
509           [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6), [s0]"=&r"(s0),  in S32_D565_Blend_Dither_mips_dsp()
550     register uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8;  in S32A_D565_Opaque_mips_dsp()  local
642           [t3]"=&r"(t3), [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6),  in S32A_D565_Opaque_mips_dsp()
661     register uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8, t9;  in S32A_D565_Blend_mips_dsp()  local
745           [t6]"=&r"(t6), [t7]"=&r"(t7), [t8]"=&r"(t8), [t9]"=&r"(t9)  in S32A_D565_Blend_mips_dsp()
768     register int32_t t0, t1, t2, t3, t4, t5, t6, t7;  in S32_Blend_BlitRow32_mips_dsp()  local
802           [t4]"=&r"(t4), [t5]"=&r"(t5), [t6]"=&r"(t6), [t7]"=&r"(t7)  in S32_Blend_BlitRow32_mips_dsp()