Lines Matching refs:mkU64
248 static IRExpr* mkU64 ( ULong i ) in mkU64() function
790 case Ity_I64: return mkU64(imm); in mkU()
1227 return mkU64(0); in getIReg64orZR()
1763 return mk_arm64g_calculate_condition_dyn( mkU64(cond << 4) ); in mk_arm64g_calculate_condition()
1847 stmt( IRStmt_Put( OFFB_CC_OP, mkU64(cc_op) )); in setFlags_D1_D2_ND()
1869 assign(z64, mkU64(0)); in setFlags_ADD_SUB()
1925 assign(z64, mkU64(0)); in setFlags_ADD_SUB_conditionally()
1951 assign(f_dep1, mkU64(nzcv << 28)); in setFlags_ADD_SUB_conditionally()
1958 assign(op, IRExpr_ITE(mkexpr(cond), mkU64(t_op), mkU64(f_op))); in setFlags_ADD_SUB_conditionally()
1984 assign(z64, mkU64(0)); in setFlags_LOGIC()
1994 assign(z64, mkU64(0)); in setFlags_COPY()
2044 assign(maskT, mkU64(mask)); in math_SWAPHELPER()
2240 mkU64(3)), in mk_convert_IRCmpF64Result_to_NZCV()
2241 binop(Iop_And64, mkexpr(irRes), mkU64(1)))); in mk_convert_IRCmpF64Result_to_NZCV()
2249 binop(Iop_Xor64, mkexpr(ix), mkU64(1)), in mk_convert_IRCmpF64Result_to_NZCV()
2251 mkU64(1)), in mk_convert_IRCmpF64Result_to_NZCV()
2253 mkU64(1))); in mk_convert_IRCmpF64Result_to_NZCV()
2261 mkU64(1))); in mk_convert_IRCmpF64Result_to_NZCV()
2423 assign(argR, mkU64(uimm12)); in dis_ARM64_data_processing_immediate()
2473 putIReg64orZR(rD, mkU64(val)); in dis_ARM64_data_processing_immediate()
2510 IRExpr* argR = mkU64(imm); in dis_ARM64_data_processing_immediate()
2564 putIRegOrZR(is64, dd, is64 ? mkU64(imm64) : mkU32((UInt)imm64)); in dis_ARM64_data_processing_immediate()
2571 putIRegOrZR(is64, dd, is64 ? mkU64(imm64) : mkU32((UInt)imm64)); in dis_ARM64_data_processing_immediate()
2584 binop(Iop_And64, mkexpr(old), mkU64(~mask)), in dis_ARM64_data_processing_immediate()
2585 mkU64(imm64)); in dis_ARM64_data_processing_immediate()
2876 IRExpr* one = is64 ? mkU64(1) : mkU32(1); in dis_ARM64_data_processing_register()
3116 xMw = binop(Iop_And64, xMw, mkU64(0xFF)); break; in dis_ARM64_data_processing_register()
3118 xMw = binop(Iop_And64, xMw, mkU64(0xFFFF)); break; in dis_ARM64_data_processing_register()
3209 assign(argR, mkU64(imm5)); in dis_ARM64_data_processing_register()
3363 assign(dst, IRExpr_ITE(binop(Iop_CmpEQ64, mkexpr(srcZ), mkU64(0)), in dis_ARM64_data_processing_register()
3364 mkU64(isCLS ? 63 : 64), in dis_ARM64_data_processing_register()
3368 assign(dst, IRExpr_ITE(binop(Iop_CmpEQ64, mkexpr(srcZ), mkU64(0)), in dis_ARM64_data_processing_register()
3369 mkU64(isCLS ? 31 : 32), in dis_ARM64_data_processing_register()
3399 mkU64(is64 ? 63 : 31))); in dis_ARM64_data_processing_register()
3415 IRExpr* width = mkU64(is64 ? 64: 32); in dis_ARM64_data_processing_register()
3419 binop(Iop_CmpEQ64, mkexpr(srcR), mkU64(0)), in dis_ARM64_data_processing_register()
4664 assign(ta, binop(Iop_Add64, getIReg64orSP(nn), mkU64(offs))); in dis_ARM64_load_store()
4726 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store()
4830 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm7))); in dis_ARM64_load_store()
4866 binop(Iop_Add64,mkexpr(tTA),mkU64(0)))); in dis_ARM64_load_store()
4868 binop(Iop_Add64,mkexpr(tTA),mkU64(8)))); in dis_ARM64_load_store()
4872 binop(Iop_Add64,mkexpr(tTA),mkU64(0)))); in dis_ARM64_load_store()
4874 binop(Iop_Add64,mkexpr(tTA),mkU64(4)))); in dis_ARM64_load_store()
4877 storeLE(binop(Iop_Add64,mkexpr(tTA),mkU64(0)), in dis_ARM64_load_store()
4879 storeLE(binop(Iop_Add64,mkexpr(tTA),mkU64(8)), in dis_ARM64_load_store()
4884 storeLE(binop(Iop_Add64,mkexpr(tTA),mkU64(0)), in dis_ARM64_load_store()
4886 storeLE(binop(Iop_Add64,mkexpr(tTA),mkU64(4)), in dis_ARM64_load_store()
4929 putIReg64orZR(rT, loadLE(Ity_I64, mkU64(ea))); in dis_ARM64_load_store()
4931 putIReg32orZR(rT, loadLE(Ity_I32, mkU64(ea))); in dis_ARM64_load_store()
5030 getIReg64orSP(nn), mkU64(imm12 * szB)); in dis_ARM64_load_store()
5104 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store()
5180 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store()
5267 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm7))); in dis_ARM64_load_store()
5316 loadLE(ty, binop(Iop_Add64, mkexpr(tTA), mkU64(0)))); in dis_ARM64_load_store()
5321 loadLE(ty, binop(Iop_Add64, mkexpr(tTA), mkU64(szB)))); in dis_ARM64_load_store()
5323 storeLE(binop(Iop_Add64, mkexpr(tTA), mkU64(0)), in dis_ARM64_load_store()
5325 storeLE(binop(Iop_Add64, mkexpr(tTA), mkU64(szB)), in dis_ARM64_load_store()
5515 assign(tEA, binop(Iop_Add64, getIReg64orSP(nn), mkU64(pimm12))); in dis_ARM64_load_store()
5565 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store()
5607 assign(tEA, binop(Iop_Add64, getIReg64orSP(nn), mkU64(simm9))); in dis_ARM64_load_store()
5635 putQRegLO(tt, loadLE(ty, mkU64(ea))); in dis_ARM64_load_store()
5704 mm == BITS5(1,1,1,1,1) ? mkU64(xferSzB) in dis_ARM64_load_store()
5748 case 4: storeLE( binop(Iop_Add64, mkexpr(tTA), mkU64(3*step)), in dis_ARM64_load_store()
5751 case 3: storeLE( binop(Iop_Add64, mkexpr(tTA), mkU64(2*step)), in dis_ARM64_load_store()
5754 case 2: storeLE( binop(Iop_Add64, mkexpr(tTA), mkU64(1*step)), in dis_ARM64_load_store()
5757 case 1: storeLE( binop(Iop_Add64, mkexpr(tTA), mkU64(0*step)), in dis_ARM64_load_store()
5776 mkU64(3 * step))))); in dis_ARM64_load_store()
5782 mkU64(2 * step))))); in dis_ARM64_load_store()
5788 mkU64(1 * step))))); in dis_ARM64_load_store()
5794 mkU64(0 * step))))); in dis_ARM64_load_store()
5915 mm == BITS5(1,1,1,1,1) ? mkU64(xferSzB) in dis_ARM64_load_store()
5944 case 4: storeLE( binop(Iop_Add64, mkexpr(tTA), mkU64(3*step)), in dis_ARM64_load_store()
5947 case 3: storeLE( binop(Iop_Add64, mkexpr(tTA), mkU64(2*step)), in dis_ARM64_load_store()
5950 case 2: storeLE( binop(Iop_Add64, mkexpr(tTA), mkU64(1*step)), in dis_ARM64_load_store()
5952 storeLE( binop(Iop_Add64, mkexpr(tTA), mkU64(0*step)), in dis_ARM64_load_store()
5971 mkU64(3 * step))))); in dis_ARM64_load_store()
5977 mkU64(2 * step))))); in dis_ARM64_load_store()
5983 mkU64(1 * step))))); in dis_ARM64_load_store()
5987 mkU64(0 * step))))); in dis_ARM64_load_store()
6083 mm == BITS5(1,1,1,1,1) ? mkU64(xferSzB) in dis_ARM64_load_store()
6098 mkU64(3 * laneSzB)))); in dis_ARM64_load_store()
6105 mkU64(2 * laneSzB)))); in dis_ARM64_load_store()
6112 mkU64(1 * laneSzB)))); in dis_ARM64_load_store()
6119 mkU64(0 * laneSzB)))); in dis_ARM64_load_store()
6229 mm == BITS5(1,1,1,1,1) ? mkU64(xferSzB) in dis_ARM64_load_store()
6241 = binop(Iop_Add64, mkexpr(tTA), mkU64(3 * laneSzB)); in dis_ARM64_load_store()
6251 = binop(Iop_Add64, mkexpr(tTA), mkU64(2 * laneSzB)); in dis_ARM64_load_store()
6261 = binop(Iop_Add64, mkexpr(tTA), mkU64(1 * laneSzB)); in dis_ARM64_load_store()
6271 = binop(Iop_Add64, mkexpr(tTA), mkU64(0 * laneSzB)); in dis_ARM64_load_store()
6350 mkU64(1))); in dis_ARM64_load_store()
6409 assign(ea, binop(Iop_Add64, getIReg64orSP(nn), mkU64(imm12 * 8))); in dis_ARM64_load_store()
6461 putPC(mkU64(guest_PC_curr_instr + 4)); in dis_ARM64_branch_etc()
6477 putIReg64orSP(30, mkU64(guest_PC_curr_instr + 4)); in dis_ARM64_branch_etc()
6479 putPC(mkU64(guest_PC_curr_instr + simm64)); in dis_ARM64_branch_etc()
6509 putIReg64orSP(30, mkU64(guest_PC_curr_instr + 4)); in dis_ARM64_branch_etc()
6538 getIReg64orZR(rT), mkU64(0)); in dis_ARM64_branch_etc()
6547 putPC(mkU64(guest_PC_curr_instr + 4)); in dis_ARM64_branch_etc()
6574 mkU64(1)), in dis_ARM64_branch_etc()
6575 mkU64(0)); in dis_ARM64_branch_etc()
6580 putPC(mkU64(guest_PC_curr_instr + 4)); in dis_ARM64_branch_etc()
6594 putPC(mkU64(guest_PC_curr_instr + 4)); in dis_ARM64_branch_etc()
6653 mkU64(1))); in dis_ARM64_branch_etc()
6667 binop(Iop_CmpNE64, mkexpr(qc64), mkU64(0))), in dis_ARM64_branch_etc()
6687 assign(t, binop(Iop_And64, getIReg64orZR(tt), mkU64(0xF0000000ULL))); in dis_ARM64_branch_etc()
6706 putIReg64orZR(tt, mkU64(1<<4)); in dis_ARM64_branch_etc()
6732 putIReg64orZR(tt, mkU64(val)); in dis_ARM64_branch_etc()
6773 mkU64(~(lineszB - 1))) ); in dis_ARM64_branch_etc()
6777 stmt(IRStmt_Put(OFFB_CMLEN, mkU64(lineszB))); in dis_ARM64_branch_etc()
6780 putPC(mkU64( guest_PC_curr_instr + 4 )); in dis_ARM64_branch_etc()
6804 mkU64(~(lineszB - 1))) ); in dis_ARM64_branch_etc()
6808 stmt(IRStmt_Put(OFFB_CMLEN, mkU64(lineszB))); in dis_ARM64_branch_etc()
6811 putPC(mkU64( guest_PC_curr_instr + 4 )); in dis_ARM64_branch_etc()
6855 putPC(mkU64(guest_PC_curr_instr + 0)); in dis_ARM64_branch_etc()
6868 putPC(mkU64(guest_PC_curr_instr + 4)); in dis_ARM64_branch_etc()
7385 assign(half15, mkU64(0x0F0F0F0F0F0F0F0FULL)); in math_TBL_TBX()
7387 assign(half16, mkU64(0x1010101010101010ULL)); in math_TBL_TBX()
7712 rcS = newTemp(ty); assign(rcS, mkU64(imm)); break; in math_VEC_DUP_IMM()
8057 assign(imm64, mkU64(ones64[size])); in math_RHADD()
8652 isQ ? mkexpr(w1) : mkU64(0), mkexpr(w1))); in dis_AdvSIMD_copy()
8977 = binop(Iop_64HLtoV128, mkU64(inv ^ imm64lo), mkU64(inv ^ imm64lo)); in dis_AdvSIMD_modified_immediate()
8993 IRExpr* immV128 = binop(Iop_64HLtoV128, mkU64(imm64hi), in dis_AdvSIMD_modified_immediate()
8994 mkU64(imm64lo)); in dis_AdvSIMD_modified_immediate()
9062 putQReg128(dd, binop(Iop_64HLtoV128, mkU64(0), mkexpr(w0))); in dis_AdvSIMD_scalar_copy()
9249 IRExpr* nmaskV = binop(Iop_64HLtoV128, mkU64(nmask), mkU64(nmask)); in dis_AdvSIMD_scalar_shift_by_imm()
9281 IRExpr* nmaskV = binop(Iop_64HLtoV128, mkU64(nmask), mkU64(nmask)); in dis_AdvSIMD_scalar_shift_by_imm()
9416 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_scalar_shift_by_imm()
9455 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_scalar_shift_by_imm()
9693 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_scalar_three_same()
10047 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_scalar_two_reg_misc()
10097 putQRegLane(dd, 1, mkU64(0)); /* bits 127-64 */ in dis_AdvSIMD_scalar_two_reg_misc()
10117 putQRegLane(dd, 1, mkU64(0)); /* bits 127-64 */ in dis_AdvSIMD_scalar_two_reg_misc()
10776 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_shift_by_immediate()
10823 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_shift_by_immediate()
12221 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_two_reg_misc()
12246 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_two_reg_misc()
12334 putQRegLane(dd, 1, mkU64(0)); // zero out lanes 2 and 3 in dis_AdvSIMD_two_reg_misc()
12391 putQRegLane(dd, 1, mkU64(0)); // zero out lanes 2 and 3 in dis_AdvSIMD_two_reg_misc()
12443 putQRegLane(dd, 1, mkU64(0)); in dis_AdvSIMD_two_reg_misc()
12931 IRExpr* nzcvF_28x0 = mkU64(((ULong)nzcv) << 28); in dis_AdvSIMD_fp_conditional_compare()
13364 putQRegLO(dd, isD ? mkU64(imm) : mkU32(imm & 0xFFFFFFFFULL)); in dis_AdvSIMD_fp_immediate()
13892 putPC(mkU64( guest_PC_curr_instr + 20 )); in disInstr_ARM64_WRK()
13911 putIReg64orZR(30, mkU64(guest_PC_curr_instr + 20)); in disInstr_ARM64_WRK()
13927 stmt(IRStmt_Put(OFFB_CMSTART, mkU64(guest_PC_curr_instr))); in disInstr_ARM64_WRK()
13928 stmt(IRStmt_Put(OFFB_CMLEN, mkU64(20))); in disInstr_ARM64_WRK()
13929 putPC(mkU64( guest_PC_curr_instr + 20 )); in disInstr_ARM64_WRK()
14044 putPC( mkU64(dres.len + guest_PC_curr_instr) ); in disInstr_ARM64()
14048 putPC(mkU64(dres.continueAt)); in disInstr_ARM64()
14080 putPC( mkU64(guest_PC_curr_instr) ); in disInstr_ARM64()