36   const CGEN_INSN *	insn;  member
197   mt_insn insn;  in md_assemble()  local
203   insn.insn = mt_cgen_assemble_insn  in md_assemble()
204       (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);  in md_assemble()
206   if (!insn.insn)  in md_assemble()
213   gas_cgen_finish_insn (insn.insn, insn.buffer,  in md_assemble()
214 			CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);  in md_assemble()
222 	  && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_MEMORY_ACCESS)  in md_assemble()
225 		 CGEN_INSN_NAME (insn.insn));  in md_assemble()
229 	       && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_IO_INSN))  in md_assemble()
231 		 CGEN_INSN_NAME (insn.insn));  in md_assemble()
235 	       && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN))  in md_assemble()
237 		 CGEN_INSN_NAME (insn.insn));  in md_assemble()
242 	  if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)  in md_assemble()
243 	      && insn.fields.f_sr1 == delayed_load_register)  in md_assemble()
245 		     insn.fields.f_sr1);  in md_assemble()
247 	  if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2)  in md_assemble()
248 	      && insn.fields.f_sr2 == delayed_load_register)  in md_assemble()
250 		     insn.fields.f_sr2);  in md_assemble()
255 	  && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_JAL_HAZARD))  in md_assemble()
257 	  if ((CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)  in md_assemble()
258 	       && insn.fields.f_sr1 == delayed_load_register)  in md_assemble()
259 	      || (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2)  in md_assemble()
260 		  && insn.fields.f_sr2 == delayed_load_register))  in md_assemble()
263 	  else if ((CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)  in md_assemble()
264 		    && insn.fields.f_sr1 == prev_delayed_load_register)  in md_assemble()
265 		   || (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2)  in md_assemble()
266 		       && insn.fields.f_sr2 == prev_delayed_load_register))  in md_assemble()
276 	  && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN)  in md_assemble()
279 	  if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)  in md_assemble()
280 	      && insn.fields.f_sr1 == delayed_load_register)  in md_assemble()
282 		     insn.fields.f_sr1);  in md_assemble()
284 	  if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2)  in md_assemble()
285 	      && insn.fields.f_sr2 == delayed_load_register)  in md_assemble()
287 		     insn.fields.f_sr2);  in md_assemble()
296     CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);  in md_assemble()
300     CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_LOAD_DELAY);  in md_assemble()
303     CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_MEMORY_ACCESS);  in md_assemble()
306     CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_IO_INSN);  in md_assemble()
309     CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_AL_INSN);  in md_assemble()
312     CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN);  in md_assemble()
315   CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN)  in md_assemble()
316     && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2);  in md_assemble()
320   if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRDR))  in md_assemble()
321      delayed_load_register = insn.fields.f_dr;   in md_assemble()
322   else if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRDRRR))  in md_assemble()
323      delayed_load_register = insn.fields.f_drrr;   in md_assemble()
392 md_cgen_lookup_reloc (const CGEN_INSN *    insn     ATTRIBUTE_UNUSED,  in md_cgen_lookup_reloc()
464       const CGEN_INSN *insn = NULL;  in mt_fix_adjustable()  local
469       md_cgen_lookup_reloc (insn, operand, fixP);  in mt_fix_adjustable()