Lines Matching refs:modrm
3094 modrm; variable
12375 dp = ®_table[dp->op[1].bytemode][modrm.reg]; in get_valid_dis386()
12379 vindex = modrm.mod == 0x3 ? 1 : 0; in get_valid_dis386()
12384 dp = &rm_table[dp->op[1].bytemode][modrm.rm]; in get_valid_dis386()
12468 modrm.mod = (*codep >> 6) & 3; in get_valid_dis386()
12469 modrm.reg = (*codep >> 3) & 7; in get_valid_dis386()
12470 modrm.rm = *codep & 7; in get_valid_dis386()
12552 modrm.mod = (*codep >> 6) & 3; in get_valid_dis386()
12553 modrm.reg = (*codep >> 3) & 7; in get_valid_dis386()
12554 modrm.rm = *codep & 7; in get_valid_dis386()
12617 modrm.mod = (*codep >> 6) & 3; in get_valid_dis386()
12618 modrm.reg = (*codep >> 3) & 7; in get_valid_dis386()
12619 modrm.rm = *codep & 7; in get_valid_dis386()
12666 modrm.mod = (*codep >> 6) & 3; in get_valid_dis386()
12667 modrm.reg = (*codep >> 3) & 7; in get_valid_dis386()
12668 modrm.rm = *codep & 7; in get_valid_dis386()
12758 modrm.mod = (*codep >> 6) & 3; in get_valid_dis386()
12759 modrm.reg = (*codep >> 3) & 7; in get_valid_dis386()
12760 modrm.rm = *codep & 7; in get_valid_dis386()
12763 if (modrm.mod == 3 && vex.b) in get_valid_dis386()
12804 && modrm.mod != 3 in get_sib()
12805 && modrm.rm == 4) in get_sib()
13058 modrm.mod = (*codep >> 6) & 3; in print_insn()
13059 modrm.reg = (*codep >> 3) & 7; in print_insn()
13060 modrm.rm = *codep & 7; in print_insn()
13545 if (modrm.mod != 3) in dofloat()
13547 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg; in dofloat()
13559 dp = &float_reg[floatop - 0xd8][modrm.reg]; in dofloat()
13562 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag); in dofloat()
13601 sprintf (scratchbuf, "%%st(%d)", modrm.rm); in OP_STi()
13658 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) in putop()
13707 if (modrm.mod == 3) in putop()
13902 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) in putop()
13915 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) in putop()
13937 || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS))) in putop()
14084 || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS))) in putop()
14656 int reg = modrm.rm; in OP_E_register()
14881 base = modrm.rm; in OP_E_memory()
14940 switch (modrm.mod) in OP_E_memory()
14975 if (modrm.mod != 0 || base == 5) in OP_E_memory()
15034 && (disp || modrm.mod != 0 || base == 5)) in OP_E_memory()
15041 else if (modrm.mod != 1 && disp != -disp) in OP_E_memory()
15060 if (modrm.mod != 0 || base == 5) in OP_E_memory()
15076 switch (modrm.mod) in OP_E_memory()
15079 if (modrm.rm == 6) in OP_E_memory()
15100 if (modrm.mod != 0 || modrm.rm == 6) in OP_E_memory()
15106 if (modrm.mod != 0 || modrm.rm != 6) in OP_E_memory()
15110 oappend (index16[modrm.rm]); in OP_E_memory()
15112 && (disp || modrm.mod != 0 || modrm.rm == 6)) in OP_E_memory()
15119 else if (modrm.mod != 1) in OP_E_memory()
15195 if (modrm.mod == 3) in OP_E()
15213 oappend (names8rex[modrm.reg + add]); in OP_G()
15215 oappend (names8[modrm.reg + add]); in OP_G()
15218 oappend (names16[modrm.reg + add]); in OP_G()
15223 oappend (names32[modrm.reg + add]); in OP_G()
15226 oappend (names64[modrm.reg + add]); in OP_G()
15229 oappend (names_bnd[modrm.reg]); in OP_G()
15239 oappend (names64[modrm.reg + add]); in OP_G()
15243 oappend (names32[modrm.reg + add]); in OP_G()
15245 oappend (names16[modrm.reg + add]); in OP_G()
15251 oappend (names64[modrm.reg + add]); in OP_G()
15253 oappend (names32[modrm.reg + add]); in OP_G()
15257 oappend (names_mask[modrm.reg + add]); in OP_G()
15686 oappend (names_seg[modrm.reg]); in OP_SEG()
15688 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag); in OP_SEG()
15861 sprintf (scratchbuf, "%%cr%d", modrm.reg + add); in OP_C()
15875 sprintf (scratchbuf, "db%d", modrm.reg + add); in OP_D()
15877 sprintf (scratchbuf, "%%db%d", modrm.reg + add); in OP_D()
15884 sprintf (scratchbuf, "%%tr%d", modrm.reg); in OP_T()
15900 int reg = modrm.reg; in OP_MMX()
15919 int reg = modrm.reg; in OP_XMM()
15987 if (modrm.mod != 3) in OP_EM()
16006 reg = modrm.rm; in OP_EM()
16027 if (modrm.mod != 3) in OP_EMC()
16042 oappend (names_mm[modrm.rm]); in OP_EMC()
16049 oappend (names_mm[modrm.reg]); in OP_MXC()
16062 if (modrm.mod != 3) in OP_EX()
16068 reg = modrm.rm; in OP_EX()
16147 if (modrm.mod == 3) in OP_MS()
16156 if (modrm.mod == 3) in OP_XS()
16165 if (modrm.mod == 3) in OP_M()
16175 if (modrm.mod != 3 || modrm.rm != 0) in OP_0f07()
16440 if (modrm.mod != 3 in HLE_Fixup1()
16459 if (modrm.mod != 3) in HLE_Fixup2()
16476 if (modrm.mod != 3 in HLE_Fixup3()
16568 if (modrm.mod == 3) in CRC32_Fixup()
16582 oappend (names8rex[modrm.rm + add]); in CRC32_Fixup()
16584 oappend (names8[modrm.rm + add]); in CRC32_Fixup()
16590 oappend (names64[modrm.rm + add]); in CRC32_Fixup()
16592 oappend (names16[modrm.rm + add]); in CRC32_Fixup()
16594 oappend (names32[modrm.rm + add]); in CRC32_Fixup()
16708 if (modrm.mod != 3) in get_vex_imm8()
16714 int base = modrm.rm; in get_vex_imm8()
16734 switch (modrm.mod) in get_vex_imm8()
16761 switch (modrm.mod) in get_vex_imm8()
16765 if (modrm.rm != 6) in get_vex_imm8()
16795 if (reg == -1 && modrm.mod != 3) in OP_EX_VexReg()
16804 reg = modrm.rm; in OP_EX_VexReg()
16871 if (modrm.mod == 3) in OP_Vex_2src()
16873 int reg = modrm.rm; in OP_Vex_2src()
16894 if (modrm.mod == 3) in OP_Vex_2src_1()
16996 if (modrm.mod != 3) in OP_EX_Vex()
17008 if (modrm.mod != 3) in OP_XMM_Vex()
17244 reg = modrm.rm; in OP_LWPCB_E()
17279 oappend (names_mask [modrm.reg]); in OP_Mask()
17289 if (modrm.mod == 3 && vex.b) in OP_Rounding()