Lines Matching refs:HW_H_UINT

565 …{ "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
1042   { "csrn-idx", MEP_OPERAND_CSRN_IDX, HW_H_UINT, 8, 5,
1066   { "cccc", MEP_OPERAND_CCCC, HW_H_UINT, 8, 4,
1086   { "pcabs24a2", MEP_OPERAND_PCABS24A2, HW_H_UINT, 5, 23,
1098   { "uimm16", MEP_OPERAND_UIMM16, HW_H_UINT, 16, 16,
1102   { "code16", MEP_OPERAND_CODE16, HW_H_UINT, 16, 16,
1110   { "uimm2", MEP_OPERAND_UIMM2, HW_H_UINT, 10, 2,
1122   { "addr24a4", MEP_OPERAND_ADDR24A4, HW_H_UINT, 8, 22,
1126   { "code24", MEP_OPERAND_CODE24, HW_H_UINT, 4, 24,
1130   { "callnum", MEP_OPERAND_CALLNUM, HW_H_UINT, 5, 4,
1134   { "uimm3", MEP_OPERAND_UIMM3, HW_H_UINT, 5, 3,
1138   { "uimm4", MEP_OPERAND_UIMM4, HW_H_UINT, 8, 4,
1142   { "uimm5", MEP_OPERAND_UIMM5, HW_H_UINT, 8, 5,
1146   { "udisp7", MEP_OPERAND_UDISP7, HW_H_UINT, 9, 7,
1150   { "udisp7a2", MEP_OPERAND_UDISP7A2, HW_H_UINT, 9, 6,
1154   { "udisp7a4", MEP_OPERAND_UDISP7A4, HW_H_UINT, 9, 5,
1158   { "uimm7a4", MEP_OPERAND_UIMM7A4, HW_H_UINT, 9, 5,
1162   { "uimm24", MEP_OPERAND_UIMM24, HW_H_UINT, 8, 24,
1166   { "cimm4", MEP_OPERAND_CIMM4, HW_H_UINT, 4, 4,
1170   { "cimm5", MEP_OPERAND_CIMM5, HW_H_UINT, 24, 5,
1202   { "c5rmuimm20", MEP_OPERAND_C5RMUIMM20, HW_H_UINT, 8, 20,
1206   { "c5rnmuimm24", MEP_OPERAND_C5RNMUIMM24, HW_H_UINT, 4, 24,
1318   { "ivc-x-6-1", MEP_OPERAND_IVC_X_6_1, HW_H_UINT, 6, 1,
1322   { "ivc-x-6-2", MEP_OPERAND_IVC_X_6_2, HW_H_UINT, 6, 2,
1326   { "ivc-x-6-3", MEP_OPERAND_IVC_X_6_3, HW_H_UINT, 6, 3,
1330   { "imm3p4", MEP_OPERAND_IMM3P4, HW_H_UINT, 4, 3,
1334   { "imm3p9", MEP_OPERAND_IMM3P9, HW_H_UINT, 9, 3,
1338   { "imm4p8", MEP_OPERAND_IMM4P8, HW_H_UINT, 8, 4,
1342   { "imm5p7", MEP_OPERAND_IMM5P7, HW_H_UINT, 7, 5,
1346   { "imm6p6", MEP_OPERAND_IMM6P6, HW_H_UINT, 6, 6,
1350   { "imm8p4", MEP_OPERAND_IMM8P4, HW_H_UINT, 4, 8,
1358   { "imm3p5", MEP_OPERAND_IMM3P5, HW_H_UINT, 5, 3,
1362   { "imm3p12", MEP_OPERAND_IMM3P12, HW_H_UINT, 12, 3,
1366   { "imm4p4", MEP_OPERAND_IMM4P4, HW_H_UINT, 4, 4,
1370   { "imm4p10", MEP_OPERAND_IMM4P10, HW_H_UINT, 10, 4,
1374   { "imm5p8", MEP_OPERAND_IMM5P8, HW_H_UINT, 8, 5,
1378   { "imm5p3", MEP_OPERAND_IMM5P3, HW_H_UINT, 3, 5,
1382   { "imm6p2", MEP_OPERAND_IMM6P2, HW_H_UINT, 2, 6,
1386   { "imm5p23", MEP_OPERAND_IMM5P23, HW_H_UINT, 23, 5,
1390   { "imm3p25", MEP_OPERAND_IMM3P25, HW_H_UINT, 25, 3,
1394   { "imm8p0", MEP_OPERAND_IMM8P0, HW_H_UINT, 0, 8,
1406   { "imm8p20", MEP_OPERAND_IMM8P20, HW_H_UINT, 20, 8,
1422   { "ivc-x-0-2", MEP_OPERAND_IVC_X_0_2, HW_H_UINT, 0, 2,
1426   { "ivc-x-0-3", MEP_OPERAND_IVC_X_0_3, HW_H_UINT, 0, 3,
1430   { "ivc-x-0-4", MEP_OPERAND_IVC_X_0_4, HW_H_UINT, 0, 4,
1434   { "ivc-x-0-5", MEP_OPERAND_IVC_X_0_5, HW_H_UINT, 0, 5,
1438   { "imm16p0", MEP_OPERAND_IMM16P0, HW_H_UINT, 0, 16,