| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 126 unsigned DstReg; in runOnMachineFunction() local
155 unsigned DstReg; in runOnMachineFunction() local
183 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
202 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
272 unsigned DstReg = MI.getOperand( in runOnMachineFunction() local
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| D | SIFixSGPRCopies.cpp | 132 unsigned DstReg = Copy.getOperand(0).getReg(); in getCopyRegClasses() local
182 unsigned DstReg = MI.getOperand(0).getReg(); in foldVGPRCopyIntoRegSequence() local
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| D | SIShrinkInstructions.cpp | 251 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonPeephole.cpp | 141 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
163 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
180 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
192 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
215 unsigned DstReg = Dst.getReg(); in runOnMachineFunction() local
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| D | HexagonInstrInfo.cpp | 786 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
795 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
805 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
843 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
863 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
908 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
930 unsigned DstReg = MI->getOperand(0).getReg(); in expandPostRAPseudo() local
2839 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
3172 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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| D | HexagonExpandPredSpillCode.cpp | 288 int DstReg = MI->getOperand(0).getReg(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 117 const unsigned DstReg = MI.getOperand(0).getReg(); in tryOrrMovk() local
182 const unsigned DstReg = MI.getOperand(0).getReg(); in tryToreplicateChunks() local
365 const unsigned DstReg = MI.getOperand(0).getReg(); in trySequenceOfOnes() local
534 unsigned DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
651 unsigned DstReg = MI.getOperand(0).getReg(); in expandMI() local
691 unsigned DstReg = MI.getOperand(0).getReg(); in expandMI() local
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| D | AArch64InstrInfo.cpp | 403 unsigned DstReg, in insertSelect()
595 unsigned &SrcReg, unsigned &DstReg, in isCoalescableExtInstr()
1140 unsigned DstReg = MI->getOperand(0).getReg(); in isGPRCopy() local
1170 unsigned DstReg = MI->getOperand(0).getReg(); in isFPRCopy() local
2101 unsigned DstReg = MI->getOperand(0).getReg(); in foldMemoryOperandImpl() local
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| /external/llvm/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 380 unsigned &SrcReg, unsigned &DstReg, in isCopyToReg()
464 unsigned SrcReg, DstReg; in isKilled() local
475 static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) { in isTwoAddrUse()
496 unsigned &DstReg, bool &IsDstPhys) { in findOnlyInterestingUse()
734 TwoAddressInstructionPass::scanUses(unsigned DstReg) { in scanUses()
795 unsigned SrcReg, DstReg; in processCopy() local
857 unsigned DstReg; in rescheduleMIBelowKill() local
1041 unsigned DstReg; in rescheduleKillAboveMI() local
1421 unsigned DstReg = DstMO.getReg(); in collectTiedOperands() local
1678 unsigned DstReg = mi->getOperand(DstIdx).getReg(); in runOnMachineFunction() local
[all …]
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| D | OptimizePHIs.cpp | 92 unsigned DstReg = MI->getOperand(0).getReg(); in IsSingleValuePHICycle() local
135 unsigned DstReg = MI->getOperand(0).getReg(); in IsDeadPHICycle() local
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| D | RegisterCoalescer.h | 33 unsigned DstReg; variable
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| D | ExpandPostRAPseudos.cpp | 87 unsigned DstReg = MI->getOperand(0).getReg(); in LowerSubregToReg() local
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| D | RegisterCoalescer.cpp | 876 unsigned DstReg = CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg(); in reMaterializeTrivialDef() local
1093 unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx; in eliminateUndefCopy() local
1163 unsigned DstReg, in updateRegDefsUses()
1472 unsigned DstReg = CP.getDstReg(); in joinReservedPhysReg() local
2716 unsigned DstReg = Copy->getOperand(0).getReg(); in isLocalCopy() local
2748 static bool isTerminalReg(unsigned DstReg, const MachineInstr &Copy, in isTerminalReg()
2762 unsigned DstReg, DstSubReg, SrcReg, SrcSubReg; in applyTerminalRule() local
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| D | EarlyIfConversion.cpp | 463 unsigned DstReg = PI.PHI->getOperand(0).getReg(); in replacePHIInstrs() local
482 unsigned DstReg = 0; in rewritePHIOperands() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 391 unsigned DstReg = MI.getOperand(OpIdx++).getReg(); in ExpandVLD() local
521 unsigned DstReg = 0; in ExpandLaneOp() local
655 unsigned DstReg = MI.getOperand(0).getReg(); in ExpandMOV32BitImm() local
999 unsigned DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
1021 unsigned DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
1074 unsigned DstReg = MI.getOperand(0).getReg(); in ExpandMI() local
1138 unsigned DstReg = MI.getOperand(OpIdx++).getReg(); in ExpandMI() local
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCDuplexInfo.cpp | 181 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
538 unsigned DstReg, SrcReg; in subInstWouldBeExtended() local
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| D | HexagonMCCompound.cpp | 84 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIInstrInfo.cpp | 52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, in getMovImmInstr()
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| D | R600ExpandSpecialInstrs.cpp | 96 unsigned DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 551 unsigned DstReg = I->getOperand(0).getReg(); in expandPseudoMTLoHi() local
568 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
589 unsigned DstReg = I->getOperand(0).getReg(); in expandExtractElementF64() local
628 unsigned DstReg = I->getOperand(0).getReg(); in expandBuildPairF64() local
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| D | MipsSEFrameLowering.cpp | 285 unsigned DstReg = I->getOperand(0).getReg(); in expandBuildPairF64() local
327 unsigned DstReg = I->getOperand(0).getReg(); in expandExtractElementF64() local
347 unsigned DstReg = I->getOperand(0).getReg(); in expandExtractElementF64() local
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430RegisterInfo.cpp | 143 unsigned DstReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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| /external/mesa3d/src/mesa/main/ |
| D | atifragshader.h | 56 struct atifragshader_dst_register DstReg[2]; member
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXSwapRemoval.cpp | 775 unsigned DstReg, unsigned SrcReg) { in insertSwap()
856 unsigned DstReg = MI->getOperand(0).getReg(); in handleSpecialSwappables() local
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_program_alu.c | 45 struct rc_dst_register DstReg, struct rc_src_register SrcReg) in emit1()
62 struct rc_dst_register DstReg, in emit2()
81 struct rc_dst_register DstReg, in emit3()
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