1 //===-- ARMUnwindOpAsm.cpp - ARM Unwind Opcodes Assembler -------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the unwind opcode assmebler for ARM exception handling
11 // table.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #include "ARMUnwindOpAsm.h"
16 #include "llvm/Support/ARMEHABI.h"
17 #include "llvm/Support/ErrorHandling.h"
18 #include "llvm/Support/LEB128.h"
19
20 using namespace llvm;
21
22 namespace {
23 /// UnwindOpcodeStreamer - The simple wrapper over SmallVector to emit bytes
24 /// with MSB to LSB per uint32_t ordering. For example, the first byte will
25 /// be placed in Vec[3], and the following bytes will be placed in 2, 1, 0,
26 /// 7, 6, 5, 4, 11, 10, 9, 8, and so on.
27 class UnwindOpcodeStreamer {
28 private:
29 SmallVectorImpl<uint8_t> &Vec;
30 size_t Pos;
31
32 public:
UnwindOpcodeStreamer(SmallVectorImpl<uint8_t> & V)33 UnwindOpcodeStreamer(SmallVectorImpl<uint8_t> &V) : Vec(V), Pos(3) {
34 }
35
36 /// Emit the byte in MSB to LSB per uint32_t order.
EmitByte(uint8_t elem)37 inline void EmitByte(uint8_t elem) {
38 Vec[Pos] = elem;
39 Pos = (((Pos ^ 0x3u) + 1) ^ 0x3u);
40 }
41
42 /// Emit the size prefix.
EmitSize(size_t Size)43 inline void EmitSize(size_t Size) {
44 size_t SizeInWords = (Size + 3) / 4;
45 assert(SizeInWords <= 0x100u &&
46 "Only 256 additional words are allowed for unwind opcodes");
47 EmitByte(static_cast<uint8_t>(SizeInWords - 1));
48 }
49
50 /// Emit the personality index prefix.
EmitPersonalityIndex(unsigned PI)51 inline void EmitPersonalityIndex(unsigned PI) {
52 assert(PI < ARM::EHABI::NUM_PERSONALITY_INDEX &&
53 "Invalid personality prefix");
54 EmitByte(ARM::EHABI::EHT_COMPACT | PI);
55 }
56
57 /// Fill the rest of bytes with FINISH opcode.
FillFinishOpcode()58 inline void FillFinishOpcode() {
59 while (Pos < Vec.size())
60 EmitByte(ARM::EHABI::UNWIND_OPCODE_FINISH);
61 }
62 };
63 }
64
EmitRegSave(uint32_t RegSave)65 void UnwindOpcodeAssembler::EmitRegSave(uint32_t RegSave) {
66 if (RegSave == 0u)
67 return;
68
69 // One byte opcode to save register r14 and r11-r4
70 if (RegSave & (1u << 4)) {
71 // The one byte opcode will always save r4, thus we can't use the one byte
72 // opcode when r4 is not in .save directive.
73
74 // Compute the consecutive registers from r4 to r11.
75 uint32_t Mask = RegSave & 0xff0u;
76 uint32_t Range = countTrailingOnes(Mask >> 5); // Exclude r4.
77 // Mask off non-consecutive registers. Keep r4.
78 Mask &= ~(0xffffffe0u << Range);
79
80 // Emit this opcode when the mask covers every registers.
81 uint32_t UnmaskedReg = RegSave & 0xfff0u & (~Mask);
82 if (UnmaskedReg == 0u) {
83 // Pop r[4 : (4 + n)]
84 EmitInt8(ARM::EHABI::UNWIND_OPCODE_POP_REG_RANGE_R4 | Range);
85 RegSave &= 0x000fu;
86 } else if (UnmaskedReg == (1u << 14)) {
87 // Pop r[14] + r[4 : (4 + n)]
88 EmitInt8(ARM::EHABI::UNWIND_OPCODE_POP_REG_RANGE_R4_R14 | Range);
89 RegSave &= 0x000fu;
90 }
91 }
92
93 // Two bytes opcode to save register r15-r4
94 if ((RegSave & 0xfff0u) != 0)
95 EmitInt16(ARM::EHABI::UNWIND_OPCODE_POP_REG_MASK_R4 | (RegSave >> 4));
96
97 // Opcode to save register r3-r0
98 if ((RegSave & 0x000fu) != 0)
99 EmitInt16(ARM::EHABI::UNWIND_OPCODE_POP_REG_MASK | (RegSave & 0x000fu));
100 }
101
102 /// Emit unwind opcodes for .vsave directives
EmitVFPRegSave(uint32_t VFPRegSave)103 void UnwindOpcodeAssembler::EmitVFPRegSave(uint32_t VFPRegSave) {
104 // We only have 4 bits to save the offset in the opcode so look at the lower
105 // and upper 16 bits separately.
106 for (uint32_t Regs : {VFPRegSave & 0xffff0000u, VFPRegSave & 0x0000ffffu}) {
107 while (Regs) {
108 // Now look for a run of set bits. Remember the MSB and LSB of the run.
109 auto RangeMSB = 32 - countLeadingZeros(Regs);
110 auto RangeLen = countLeadingOnes(Regs << (32 - RangeMSB));
111 auto RangeLSB = RangeMSB - RangeLen;
112
113 int Opcode = RangeLSB >= 16
114 ? ARM::EHABI::UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D16
115 : ARM::EHABI::UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD;
116
117 EmitInt16(Opcode | ((RangeLSB % 16) << 4) | (RangeLen - 1));
118
119 // Zero out bits we're done with.
120 Regs &= ~(-1u << RangeLSB);
121 }
122 }
123 }
124
125 /// Emit unwind opcodes to copy address from source register to $sp.
EmitSetSP(uint16_t Reg)126 void UnwindOpcodeAssembler::EmitSetSP(uint16_t Reg) {
127 EmitInt8(ARM::EHABI::UNWIND_OPCODE_SET_VSP | Reg);
128 }
129
130 /// Emit unwind opcodes to add $sp with an offset.
EmitSPOffset(int64_t Offset)131 void UnwindOpcodeAssembler::EmitSPOffset(int64_t Offset) {
132 if (Offset > 0x200) {
133 uint8_t Buff[16];
134 Buff[0] = ARM::EHABI::UNWIND_OPCODE_INC_VSP_ULEB128;
135 size_t ULEBSize = encodeULEB128((Offset - 0x204) >> 2, Buff + 1);
136 EmitBytes(Buff, ULEBSize + 1);
137 } else if (Offset > 0) {
138 if (Offset > 0x100) {
139 EmitInt8(ARM::EHABI::UNWIND_OPCODE_INC_VSP | 0x3fu);
140 Offset -= 0x100;
141 }
142 EmitInt8(ARM::EHABI::UNWIND_OPCODE_INC_VSP |
143 static_cast<uint8_t>((Offset - 4) >> 2));
144 } else if (Offset < 0) {
145 while (Offset < -0x100) {
146 EmitInt8(ARM::EHABI::UNWIND_OPCODE_DEC_VSP | 0x3fu);
147 Offset += 0x100;
148 }
149 EmitInt8(ARM::EHABI::UNWIND_OPCODE_DEC_VSP |
150 static_cast<uint8_t>(((-Offset) - 4) >> 2));
151 }
152 }
153
Finalize(unsigned & PersonalityIndex,SmallVectorImpl<uint8_t> & Result)154 void UnwindOpcodeAssembler::Finalize(unsigned &PersonalityIndex,
155 SmallVectorImpl<uint8_t> &Result) {
156
157 UnwindOpcodeStreamer OpStreamer(Result);
158
159 if (HasPersonality) {
160 // User-specifed personality routine: [ SIZE , OP1 , OP2 , ... ]
161 PersonalityIndex = ARM::EHABI::NUM_PERSONALITY_INDEX;
162 size_t TotalSize = Ops.size() + 1;
163 size_t RoundUpSize = (TotalSize + 3) / 4 * 4;
164 Result.resize(RoundUpSize);
165 OpStreamer.EmitSize(RoundUpSize);
166 } else {
167 // If no personalityindex is specified, select ane
168 if (PersonalityIndex == ARM::EHABI::NUM_PERSONALITY_INDEX)
169 PersonalityIndex = (Ops.size() <= 3) ? ARM::EHABI::AEABI_UNWIND_CPP_PR0
170 : ARM::EHABI::AEABI_UNWIND_CPP_PR1;
171 if (PersonalityIndex == ARM::EHABI::AEABI_UNWIND_CPP_PR0) {
172 // __aeabi_unwind_cpp_pr0: [ 0x80 , OP1 , OP2 , OP3 ]
173 assert(Ops.size() <= 3 && "too many opcodes for __aeabi_unwind_cpp_pr0");
174 Result.resize(4);
175 OpStreamer.EmitPersonalityIndex(PersonalityIndex);
176 } else {
177 // __aeabi_unwind_cpp_pr{1,2}: [ {0x81,0x82} , SIZE , OP1 , OP2 , ... ]
178 size_t TotalSize = Ops.size() + 2;
179 size_t RoundUpSize = (TotalSize + 3) / 4 * 4;
180 Result.resize(RoundUpSize);
181 OpStreamer.EmitPersonalityIndex(PersonalityIndex);
182 OpStreamer.EmitSize(RoundUpSize);
183 }
184 }
185
186 // Copy the unwind opcodes
187 for (size_t i = OpBegins.size() - 1; i > 0; --i)
188 for (size_t j = OpBegins[i - 1], end = OpBegins[i]; j < end; ++j)
189 OpStreamer.EmitByte(Ops[j]);
190
191 // Emit the padding finish opcodes if the size is not multiple of 4.
192 OpStreamer.FillFinishOpcode();
193
194 // Reset the assembler state
195 Reset();
196 }
197