1 // Copyright 2014 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 #ifndef V8_COMPILER_REGISTER_CONFIGURATION_H_ 6 #define V8_COMPILER_REGISTER_CONFIGURATION_H_ 7 8 #include "src/base/macros.h" 9 #include "src/machine-type.h" 10 11 namespace v8 { 12 namespace internal { 13 14 // An architecture independent representation of the sets of registers available 15 // for instruction creation. 16 class RegisterConfiguration { 17 public: 18 enum AliasingKind { 19 // Registers alias a single register of every other size (e.g. Intel). 20 OVERLAP, 21 // Registers alias two registers of the next smaller size (e.g. ARM). 22 COMBINE 23 }; 24 25 // Architecture independent maxes. 26 static const int kMaxGeneralRegisters = 32; 27 static const int kMaxFPRegisters = 32; 28 29 // Default RegisterConfigurations for the target architecture. 30 // TODO(X87): This distinction in RegisterConfigurations is temporary 31 // until x87 TF supports all of the registers that Crankshaft does. 32 static const RegisterConfiguration* Crankshaft(); 33 static const RegisterConfiguration* Turbofan(); 34 35 RegisterConfiguration(int num_general_registers, int num_double_registers, 36 int num_allocatable_general_registers, 37 int num_allocatable_double_registers, 38 const int* allocatable_general_codes, 39 const int* allocatable_double_codes, 40 AliasingKind fp_aliasing_kind, 41 char const* const* general_names, 42 char const* const* float_names, 43 char const* const* double_names); 44 num_general_registers()45 int num_general_registers() const { return num_general_registers_; } num_float_registers()46 int num_float_registers() const { return num_float_registers_; } num_double_registers()47 int num_double_registers() const { return num_double_registers_; } num_allocatable_general_registers()48 int num_allocatable_general_registers() const { 49 return num_allocatable_general_registers_; 50 } num_allocatable_double_registers()51 int num_allocatable_double_registers() const { 52 return num_allocatable_double_registers_; 53 } num_allocatable_float_registers()54 int num_allocatable_float_registers() const { 55 return num_allocatable_float_registers_; 56 } fp_aliasing_kind()57 AliasingKind fp_aliasing_kind() const { return fp_aliasing_kind_; } allocatable_general_codes_mask()58 int32_t allocatable_general_codes_mask() const { 59 return allocatable_general_codes_mask_; 60 } allocatable_double_codes_mask()61 int32_t allocatable_double_codes_mask() const { 62 return allocatable_double_codes_mask_; 63 } GetAllocatableGeneralCode(int index)64 int GetAllocatableGeneralCode(int index) const { 65 return allocatable_general_codes_[index]; 66 } IsAllocatableGeneralCode(int index)67 bool IsAllocatableGeneralCode(int index) const { 68 return ((1 << index) & allocatable_general_codes_mask_) != 0; 69 } GetAllocatableDoubleCode(int index)70 int GetAllocatableDoubleCode(int index) const { 71 return allocatable_double_codes_[index]; 72 } IsAllocatableDoubleCode(int index)73 bool IsAllocatableDoubleCode(int index) const { 74 return ((1 << index) & allocatable_double_codes_mask_) != 0; 75 } GetAllocatableFloatCode(int index)76 int GetAllocatableFloatCode(int index) const { 77 return allocatable_float_codes_[index]; 78 } IsAllocatableFloatCode(int index)79 bool IsAllocatableFloatCode(int index) const { 80 return ((1 << index) & allocatable_float_codes_mask_) != 0; 81 } GetGeneralRegisterName(int code)82 const char* GetGeneralRegisterName(int code) const { 83 return general_register_names_[code]; 84 } GetFloatRegisterName(int code)85 const char* GetFloatRegisterName(int code) const { 86 return float_register_names_[code]; 87 } GetDoubleRegisterName(int code)88 const char* GetDoubleRegisterName(int code) const { 89 return double_register_names_[code]; 90 } allocatable_general_codes()91 const int* allocatable_general_codes() const { 92 return allocatable_general_codes_; 93 } allocatable_double_codes()94 const int* allocatable_double_codes() const { 95 return allocatable_double_codes_; 96 } allocatable_float_codes()97 const int* allocatable_float_codes() const { 98 return allocatable_float_codes_; 99 } 100 101 // Aliasing calculations for floating point registers, when fp_aliasing_kind() 102 // is COMBINE. Currently only implemented for kFloat32, or kFloat64 reps. 103 // Returns the number of aliases, and if > 0, alias_base_index is set to the 104 // index of the first alias. 105 int GetAliases(MachineRepresentation rep, int index, 106 MachineRepresentation other_rep, int* alias_base_index) const; 107 // Returns a value indicating whether two registers alias each other, when 108 // fp_aliasing_kind() is COMBINE. Currently only implemented for kFloat32, or 109 // kFloat64 reps. 110 bool AreAliases(MachineRepresentation rep, int index, 111 MachineRepresentation other_rep, int other_index) const; 112 113 private: 114 const int num_general_registers_; 115 int num_float_registers_; 116 const int num_double_registers_; 117 int num_allocatable_general_registers_; 118 int num_allocatable_double_registers_; 119 int num_allocatable_float_registers_; 120 int32_t allocatable_general_codes_mask_; 121 int32_t allocatable_double_codes_mask_; 122 int32_t allocatable_float_codes_mask_; 123 const int* allocatable_general_codes_; 124 const int* allocatable_double_codes_; 125 int allocatable_float_codes_[kMaxFPRegisters]; 126 AliasingKind fp_aliasing_kind_; 127 char const* const* general_register_names_; 128 char const* const* float_register_names_; 129 char const* const* double_register_names_; 130 }; 131 132 } // namespace internal 133 } // namespace v8 134 135 #endif // V8_COMPILER_REGISTER_CONFIGURATION_H_ 136