| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | idct16x16_msa.c | 15 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vpx_idct16_1d_rows_msa() local
109 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vpx_idct16_1d_columns_addblk_msa() local
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| /external/lldb/tools/debugserver/source/MacOSX/i386/ |
| D | DNBArchImplI386.cpp | 1015 #define DEFINE_GPR_PSEUDO_8H(reg8,reg32) { e_regSetGPR, gpr_##reg8 , #reg8 , NULL, Uint, Hex, 1, G… argument
1016 #define DEFINE_GPR_PSEUDO_8L(reg8,reg32) { e_regSetGPR, gpr_##reg8 , #reg8 , NULL, Uint, Hex, 1, G… argument
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| /external/lldb/tools/debugserver/source/MacOSX/x86_64/ |
| D | DNBArchImplX86_64.cpp | 1286 #define DEFINE_GPR_PSEUDO_8H(reg8,reg64) { e_regSetGPR, gpr_##reg8 , #reg8 , NULL, Uint, Hex, 1, G… argument
1287 #define DEFINE_GPR_PSEUDO_8L(reg8,reg64) { e_regSetGPR, gpr_##reg8 , #reg8 , NULL, Uint, Hex, 1, G… argument
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 225 const CPURegister& reg7, const CPURegister& reg8) { in AreAliased()
262 const CPURegister& reg7, const CPURegister& reg8) { in AreSameSizeAndType()
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| /external/v8/src/x87/ |
| D | macro-assembler-x87.cc | 2996 Register reg8) { in AreAliased()
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| /external/v8/src/ia32/ |
| D | macro-assembler-ia32.cc | 3149 Register reg8) { in AreAliased()
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| /external/vixl/src/vixl/a64/ |
| D | assembler-a64.cc | 5403 const CPURegister& reg7, const CPURegister& reg8) { in AreAliased()
5438 const CPURegister& reg7, const CPURegister& reg8) { in AreSameSizeAndType()
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| /external/v8/src/arm/ |
| D | macro-assembler-arm.cc | 3951 Register reg8) { in AreAliased()
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| /external/v8/src/ppc/ |
| D | macro-assembler-ppc.cc | 4795 Register reg5, Register reg6, Register reg7, Register reg8, in AreAliased()
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| /external/v8/src/x64/ |
| D | macro-assembler-x64.cc | 5459 Register reg8) { in AreAliased()
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| /external/v8/src/s390/ |
| D | macro-assembler-s390.cc | 5439 Register reg5, Register reg6, Register reg7, Register reg8, in AreAliased()
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 6839 Register reg5, Register reg6, Register reg7, Register reg8, in AreAliased()
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 7177 Register reg5, Register reg6, Register reg7, Register reg8, in AreAliased()
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