1 //===---- LiveRangeCalc.cpp - Calculate live ranges -----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Implementation of the LiveRangeCalc class.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "LiveRangeCalc.h"
15 #include "llvm/CodeGen/MachineDominators.h"
16 #include "llvm/CodeGen/MachineRegisterInfo.h"
17
18 using namespace llvm;
19
20 #define DEBUG_TYPE "regalloc"
21
resetLiveOutMap()22 void LiveRangeCalc::resetLiveOutMap() {
23 unsigned NumBlocks = MF->getNumBlockIDs();
24 Seen.clear();
25 Seen.resize(NumBlocks);
26 Map.resize(NumBlocks);
27 }
28
reset(const MachineFunction * mf,SlotIndexes * SI,MachineDominatorTree * MDT,VNInfo::Allocator * VNIA)29 void LiveRangeCalc::reset(const MachineFunction *mf,
30 SlotIndexes *SI,
31 MachineDominatorTree *MDT,
32 VNInfo::Allocator *VNIA) {
33 MF = mf;
34 MRI = &MF->getRegInfo();
35 Indexes = SI;
36 DomTree = MDT;
37 Alloc = VNIA;
38 resetLiveOutMap();
39 LiveIn.clear();
40 }
41
42
createDeadDef(SlotIndexes & Indexes,VNInfo::Allocator & Alloc,LiveRange & LR,const MachineOperand & MO)43 static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc,
44 LiveRange &LR, const MachineOperand &MO) {
45 const MachineInstr *MI = MO.getParent();
46 SlotIndex DefIdx =
47 Indexes.getInstructionIndex(MI).getRegSlot(MO.isEarlyClobber());
48
49 // Create the def in LR. This may find an existing def.
50 LR.createDeadDef(DefIdx, Alloc);
51 }
52
calculate(LiveInterval & LI,bool TrackSubRegs)53 void LiveRangeCalc::calculate(LiveInterval &LI, bool TrackSubRegs) {
54 assert(MRI && Indexes && "call reset() first");
55
56 // Step 1: Create minimal live segments for every definition of Reg.
57 // Visit all def operands. If the same instruction has multiple defs of Reg,
58 // createDeadDef() will deduplicate.
59 const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
60 unsigned Reg = LI.reg;
61 for (const MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
62 if (!MO.isDef() && !MO.readsReg())
63 continue;
64
65 unsigned SubReg = MO.getSubReg();
66 if (LI.hasSubRanges() || (SubReg != 0 && TrackSubRegs)) {
67 LaneBitmask Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
68 : MRI->getMaxLaneMaskForVReg(Reg);
69
70 // If this is the first time we see a subregister def, initialize
71 // subranges by creating a copy of the main range.
72 if (!LI.hasSubRanges() && !LI.empty()) {
73 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
74 LI.createSubRangeFrom(*Alloc, ClassMask, LI);
75 }
76
77 for (LiveInterval::SubRange &S : LI.subranges()) {
78 // A Mask for subregs common to the existing subrange and current def.
79 LaneBitmask Common = S.LaneMask & Mask;
80 if (Common == 0)
81 continue;
82 // A Mask for subregs covered by the subrange but not the current def.
83 LaneBitmask LRest = S.LaneMask & ~Mask;
84 LiveInterval::SubRange *CommonRange;
85 if (LRest != 0) {
86 // Split current subrange into Common and LRest ranges.
87 S.LaneMask = LRest;
88 CommonRange = LI.createSubRangeFrom(*Alloc, Common, S);
89 } else {
90 assert(Common == S.LaneMask);
91 CommonRange = &S;
92 }
93 if (MO.isDef())
94 createDeadDef(*Indexes, *Alloc, *CommonRange, MO);
95 Mask &= ~Common;
96 }
97 // Create a new SubRange for subregs we did not cover yet.
98 if (Mask != 0) {
99 LiveInterval::SubRange *NewRange = LI.createSubRange(*Alloc, Mask);
100 if (MO.isDef())
101 createDeadDef(*Indexes, *Alloc, *NewRange, MO);
102 }
103 }
104
105 // Create the def in the main liverange. We do not have to do this if
106 // subranges are tracked as we recreate the main range later in this case.
107 if (MO.isDef() && !LI.hasSubRanges())
108 createDeadDef(*Indexes, *Alloc, LI, MO);
109 }
110
111 // We may have created empty live ranges for partially undefined uses, we
112 // can't keep them because we won't find defs in them later.
113 LI.removeEmptySubRanges();
114
115 // Step 2: Extend live segments to all uses, constructing SSA form as
116 // necessary.
117 if (LI.hasSubRanges()) {
118 for (LiveInterval::SubRange &S : LI.subranges()) {
119 resetLiveOutMap();
120 extendToUses(S, Reg, S.LaneMask);
121 }
122 LI.clear();
123 LI.constructMainRangeFromSubranges(*Indexes, *Alloc);
124 } else {
125 resetLiveOutMap();
126 extendToUses(LI, Reg, ~0u);
127 }
128 }
129
130
createDeadDefs(LiveRange & LR,unsigned Reg)131 void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
132 assert(MRI && Indexes && "call reset() first");
133
134 // Visit all def operands. If the same instruction has multiple defs of Reg,
135 // LR.createDeadDef() will deduplicate.
136 for (MachineOperand &MO : MRI->def_operands(Reg))
137 createDeadDef(*Indexes, *Alloc, LR, MO);
138 }
139
140
extendToUses(LiveRange & LR,unsigned Reg,LaneBitmask Mask)141 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg,
142 LaneBitmask Mask) {
143 // Visit all operands that read Reg. This may include partial defs.
144 const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
145 for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
146 // Clear all kill flags. They will be reinserted after register allocation
147 // by LiveIntervalAnalysis::addKillFlags().
148 if (MO.isUse())
149 MO.setIsKill(false);
150 else {
151 // We only care about uses, but on the main range (mask ~0u) this includes
152 // the "virtual" reads happening for subregister defs.
153 if (Mask != ~0u)
154 continue;
155 }
156
157 if (!MO.readsReg())
158 continue;
159 unsigned SubReg = MO.getSubReg();
160 if (SubReg != 0) {
161 LaneBitmask SubRegMask = TRI.getSubRegIndexLaneMask(SubReg);
162 // Ignore uses not covering the current subrange.
163 if ((SubRegMask & Mask) == 0)
164 continue;
165 }
166
167 // Determine the actual place of the use.
168 const MachineInstr *MI = MO.getParent();
169 unsigned OpNo = (&MO - &MI->getOperand(0));
170 SlotIndex UseIdx;
171 if (MI->isPHI()) {
172 assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
173 // The actual place where a phi operand is used is the end of the pred
174 // MBB. PHI operands are paired: (Reg, PredMBB).
175 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
176 } else {
177 // Check for early-clobber redefs.
178 bool isEarlyClobber = false;
179 unsigned DefIdx;
180 if (MO.isDef())
181 isEarlyClobber = MO.isEarlyClobber();
182 else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
183 // FIXME: This would be a lot easier if tied early-clobber uses also
184 // had an early-clobber flag.
185 isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
186 }
187 UseIdx = Indexes->getInstructionIndex(MI).getRegSlot(isEarlyClobber);
188 }
189
190 // MI is reading Reg. We may have visited MI before if it happens to be
191 // reading Reg multiple times. That is OK, extend() is idempotent.
192 extend(LR, UseIdx, Reg);
193 }
194 }
195
196
updateFromLiveIns()197 void LiveRangeCalc::updateFromLiveIns() {
198 LiveRangeUpdater Updater;
199 for (const LiveInBlock &I : LiveIn) {
200 if (!I.DomNode)
201 continue;
202 MachineBasicBlock *MBB = I.DomNode->getBlock();
203 assert(I.Value && "No live-in value found");
204 SlotIndex Start, End;
205 std::tie(Start, End) = Indexes->getMBBRange(MBB);
206
207 if (I.Kill.isValid())
208 // Value is killed inside this block.
209 End = I.Kill;
210 else {
211 // The value is live-through, update LiveOut as well.
212 // Defer the Domtree lookup until it is needed.
213 assert(Seen.test(MBB->getNumber()));
214 Map[MBB] = LiveOutPair(I.Value, nullptr);
215 }
216 Updater.setDest(&I.LR);
217 Updater.add(Start, End, I.Value);
218 }
219 LiveIn.clear();
220 }
221
222
extend(LiveRange & LR,SlotIndex Use,unsigned PhysReg)223 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg) {
224 assert(Use.isValid() && "Invalid SlotIndex");
225 assert(Indexes && "Missing SlotIndexes");
226 assert(DomTree && "Missing dominator tree");
227
228 MachineBasicBlock *UseMBB = Indexes->getMBBFromIndex(Use.getPrevSlot());
229 assert(UseMBB && "No MBB at Use");
230
231 // Is there a def in the same MBB we can extend?
232 if (LR.extendInBlock(Indexes->getMBBStartIdx(UseMBB), Use))
233 return;
234
235 // Find the single reaching def, or determine if Use is jointly dominated by
236 // multiple values, and we may need to create even more phi-defs to preserve
237 // VNInfo SSA form. Perform a search for all predecessor blocks where we
238 // know the dominating VNInfo.
239 if (findReachingDefs(LR, *UseMBB, Use, PhysReg))
240 return;
241
242 // When there were multiple different values, we may need new PHIs.
243 calculateValues();
244 }
245
246
247 // This function is called by a client after using the low-level API to add
248 // live-out and live-in blocks. The unique value optimization is not
249 // available, SplitEditor::transferValues handles that case directly anyway.
calculateValues()250 void LiveRangeCalc::calculateValues() {
251 assert(Indexes && "Missing SlotIndexes");
252 assert(DomTree && "Missing dominator tree");
253 updateSSA();
254 updateFromLiveIns();
255 }
256
257
findReachingDefs(LiveRange & LR,MachineBasicBlock & UseMBB,SlotIndex Use,unsigned PhysReg)258 bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB,
259 SlotIndex Use, unsigned PhysReg) {
260 unsigned UseMBBNum = UseMBB.getNumber();
261
262 // Block numbers where LR should be live-in.
263 SmallVector<unsigned, 16> WorkList(1, UseMBBNum);
264
265 // Remember if we have seen more than one value.
266 bool UniqueVNI = true;
267 VNInfo *TheVNI = nullptr;
268
269 // Using Seen as a visited set, perform a BFS for all reaching defs.
270 for (unsigned i = 0; i != WorkList.size(); ++i) {
271 MachineBasicBlock *MBB = MF->getBlockNumbered(WorkList[i]);
272
273 #ifndef NDEBUG
274 if (MBB->pred_empty()) {
275 MBB->getParent()->verify();
276 errs() << "Use of " << PrintReg(PhysReg)
277 << " does not have a corresponding definition on every path:\n";
278 const MachineInstr *MI = Indexes->getInstructionFromIndex(Use);
279 if (MI != nullptr)
280 errs() << Use << " " << *MI;
281 llvm_unreachable("Use not jointly dominated by defs.");
282 }
283
284 if (TargetRegisterInfo::isPhysicalRegister(PhysReg) &&
285 !MBB->isLiveIn(PhysReg)) {
286 MBB->getParent()->verify();
287 errs() << "The register " << PrintReg(PhysReg)
288 << " needs to be live in to BB#" << MBB->getNumber()
289 << ", but is missing from the live-in list.\n";
290 llvm_unreachable("Invalid global physical register");
291 }
292 #endif
293
294 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
295 PE = MBB->pred_end(); PI != PE; ++PI) {
296 MachineBasicBlock *Pred = *PI;
297
298 // Is this a known live-out block?
299 if (Seen.test(Pred->getNumber())) {
300 if (VNInfo *VNI = Map[Pred].first) {
301 if (TheVNI && TheVNI != VNI)
302 UniqueVNI = false;
303 TheVNI = VNI;
304 }
305 continue;
306 }
307
308 SlotIndex Start, End;
309 std::tie(Start, End) = Indexes->getMBBRange(Pred);
310
311 // First time we see Pred. Try to determine the live-out value, but set
312 // it as null if Pred is live-through with an unknown value.
313 VNInfo *VNI = LR.extendInBlock(Start, End);
314 setLiveOutValue(Pred, VNI);
315 if (VNI) {
316 if (TheVNI && TheVNI != VNI)
317 UniqueVNI = false;
318 TheVNI = VNI;
319 continue;
320 }
321
322 // No, we need a live-in value for Pred as well
323 if (Pred != &UseMBB)
324 WorkList.push_back(Pred->getNumber());
325 else
326 // Loopback to UseMBB, so value is really live through.
327 Use = SlotIndex();
328 }
329 }
330
331 LiveIn.clear();
332
333 // Both updateSSA() and LiveRangeUpdater benefit from ordered blocks, but
334 // neither require it. Skip the sorting overhead for small updates.
335 if (WorkList.size() > 4)
336 array_pod_sort(WorkList.begin(), WorkList.end());
337
338 // If a unique reaching def was found, blit in the live ranges immediately.
339 if (UniqueVNI) {
340 LiveRangeUpdater Updater(&LR);
341 for (SmallVectorImpl<unsigned>::const_iterator I = WorkList.begin(),
342 E = WorkList.end(); I != E; ++I) {
343 SlotIndex Start, End;
344 std::tie(Start, End) = Indexes->getMBBRange(*I);
345 // Trim the live range in UseMBB.
346 if (*I == UseMBBNum && Use.isValid())
347 End = Use;
348 else
349 Map[MF->getBlockNumbered(*I)] = LiveOutPair(TheVNI, nullptr);
350 Updater.add(Start, End, TheVNI);
351 }
352 return true;
353 }
354
355 // Multiple values were found, so transfer the work list to the LiveIn array
356 // where UpdateSSA will use it as a work list.
357 LiveIn.reserve(WorkList.size());
358 for (SmallVectorImpl<unsigned>::const_iterator
359 I = WorkList.begin(), E = WorkList.end(); I != E; ++I) {
360 MachineBasicBlock *MBB = MF->getBlockNumbered(*I);
361 addLiveInBlock(LR, DomTree->getNode(MBB));
362 if (MBB == &UseMBB)
363 LiveIn.back().Kill = Use;
364 }
365
366 return false;
367 }
368
369
370 // This is essentially the same iterative algorithm that SSAUpdater uses,
371 // except we already have a dominator tree, so we don't have to recompute it.
updateSSA()372 void LiveRangeCalc::updateSSA() {
373 assert(Indexes && "Missing SlotIndexes");
374 assert(DomTree && "Missing dominator tree");
375
376 // Interate until convergence.
377 unsigned Changes;
378 do {
379 Changes = 0;
380 // Propagate live-out values down the dominator tree, inserting phi-defs
381 // when necessary.
382 for (LiveInBlock &I : LiveIn) {
383 MachineDomTreeNode *Node = I.DomNode;
384 // Skip block if the live-in value has already been determined.
385 if (!Node)
386 continue;
387 MachineBasicBlock *MBB = Node->getBlock();
388 MachineDomTreeNode *IDom = Node->getIDom();
389 LiveOutPair IDomValue;
390
391 // We need a live-in value to a block with no immediate dominator?
392 // This is probably an unreachable block that has survived somehow.
393 bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
394
395 // IDom dominates all of our predecessors, but it may not be their
396 // immediate dominator. Check if any of them have live-out values that are
397 // properly dominated by IDom. If so, we need a phi-def here.
398 if (!needPHI) {
399 IDomValue = Map[IDom->getBlock()];
400
401 // Cache the DomTree node that defined the value.
402 if (IDomValue.first && !IDomValue.second)
403 Map[IDom->getBlock()].second = IDomValue.second =
404 DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def));
405
406 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
407 PE = MBB->pred_end(); PI != PE; ++PI) {
408 LiveOutPair &Value = Map[*PI];
409 if (!Value.first || Value.first == IDomValue.first)
410 continue;
411
412 // Cache the DomTree node that defined the value.
413 if (!Value.second)
414 Value.second =
415 DomTree->getNode(Indexes->getMBBFromIndex(Value.first->def));
416
417 // This predecessor is carrying something other than IDomValue.
418 // It could be because IDomValue hasn't propagated yet, or it could be
419 // because MBB is in the dominance frontier of that value.
420 if (DomTree->dominates(IDom, Value.second)) {
421 needPHI = true;
422 break;
423 }
424 }
425 }
426
427 // The value may be live-through even if Kill is set, as can happen when
428 // we are called from extendRange. In that case LiveOutSeen is true, and
429 // LiveOut indicates a foreign or missing value.
430 LiveOutPair &LOP = Map[MBB];
431
432 // Create a phi-def if required.
433 if (needPHI) {
434 ++Changes;
435 assert(Alloc && "Need VNInfo allocator to create PHI-defs");
436 SlotIndex Start, End;
437 std::tie(Start, End) = Indexes->getMBBRange(MBB);
438 LiveRange &LR = I.LR;
439 VNInfo *VNI = LR.getNextValue(Start, *Alloc);
440 I.Value = VNI;
441 // This block is done, we know the final value.
442 I.DomNode = nullptr;
443
444 // Add liveness since updateFromLiveIns now skips this node.
445 if (I.Kill.isValid())
446 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI));
447 else {
448 LR.addSegment(LiveInterval::Segment(Start, End, VNI));
449 LOP = LiveOutPair(VNI, Node);
450 }
451 } else if (IDomValue.first) {
452 // No phi-def here. Remember incoming value.
453 I.Value = IDomValue.first;
454
455 // If the IDomValue is killed in the block, don't propagate through.
456 if (I.Kill.isValid())
457 continue;
458
459 // Propagate IDomValue if it isn't killed:
460 // MBB is live-out and doesn't define its own value.
461 if (LOP.first == IDomValue.first)
462 continue;
463 ++Changes;
464 LOP = IDomValue;
465 }
466 }
467 } while (Changes);
468 }
469