| /art/compiler/utils/ |
| D | assembler_thumb_test.cc | 471 __ Asr(R3, R4, 6); in TEST_F() local
482 __ Asr(R3, R4, 6, AL, kCcKeep); in TEST_F() local
1148 __ Asr(R0, R1, 5); in TEST_F() local
1152 __ Asr(R0, R0, R1); in TEST_F() local
1168 __ Asr(R0, R1, 5, AL, kCcKeep); in TEST_F() local
1172 __ Asr(R0, R0, R1, AL, kCcKeep); in TEST_F() local
1183 __ Asr(R8, R1, 5); in TEST_F() local
1189 __ Asr(R0, R1, R2); in TEST_F() local
1195 __ Asr(R0, R1, R8); in TEST_F() local
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| /art/compiler/utils/arm/ |
| D | assembler_arm.h | 833 virtual void Asr(Register rd, Register rm, uint32_t shift_imm,
837 Asr(rd, rm, shift_imm, cond, kCcSet);
868 virtual void Asr(Register rd, Register rm, Register rn,
872 Asr(rd, rm, rn, cond, kCcSet);
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| D | assembler_arm32.h | 222 virtual void Asr(Register rd, Register rm, uint32_t shift_imm,
233 virtual void Asr(Register rd, Register rm, Register rn,
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| D | assembler_thumb2.h | 269 virtual void Asr(Register rd, Register rm, uint32_t shift_imm,
280 virtual void Asr(Register rd, Register rm, Register rn,
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| D | assembler_arm32.cc | 1216 void Arm32Assembler::Asr(Register rd, Register rm, uint32_t shift_imm, in Asr() function in art::arm::Arm32Assembler
1247 void Arm32Assembler::Asr(Register rd, Register rm, Register rn, in Asr() function in art::arm::Arm32Assembler
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| D | assembler_thumb2.cc | 3294 void Thumb2Assembler::Asr(Register rd, Register rm, uint32_t shift_imm, in Asr() function in art::arm::Thumb2Assembler
3331 void Thumb2Assembler::Asr(Register rd, Register rm, Register rn, in Asr() function in art::arm::Thumb2Assembler
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| /art/compiler/optimizing/ |
| D | code_generator_arm.cc | 2312 __ Asr(out.AsRegisterPairHigh<Register>(), in VisitTypeConversion() local
2739 __ Asr(temp, dividend, 31); in DivRemByPowerOfTwo() local
2745 __ Asr(out, out, ctz_imm); in DivRemByPowerOfTwo() local
2783 __ Asr(temp1, temp1, shift); in GenerateDivRemWithAnyConstant() local
3322 __ Asr(out_reg, first_reg, out_reg); in HandleShift() local
3334 __ Asr(out_reg, first_reg, shift_value); in HandleShift() local
3378 __ Asr(o_l, high, temp, PL); in HandleShift() local
3380 __ Asr(o_h, high, o_h); in HandleShift() local
3404 __ Asr(o_l, high, shift_value - 32); in HandleShift() local
3405 __ Asr(o_h, high, 31); in HandleShift() local
[all …]
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| D | code_generator_arm64.cc | 1809 __ Asr(dst, lhs, shift_value); in HandleShift() local
1819 __ Asr(dst, lhs, rhs_reg); in HandleShift() local
2561 __ Asr(out, out, ctz_imm); in DivRemByPowerOfTwo() local
2567 __ Asr(temp, dividend, bits - 1); in DivRemByPowerOfTwo() local
2612 __ Asr(temp, temp, shift); in GenerateDivRemWithAnyConstant() local
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| D | intrinsics_arm.cc | 297 __ Asr(mask, in_reg_hi, 31); in GenAbsInteger() local
306 __ Asr(mask, in_reg, 31); in GenAbsInteger() local
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