Searched refs:TMP2 (Results 1 – 3 of 3) sorted by relevance
| /art/runtime/arch/mips64/ |
| D | registers_mips64.h | 64 TMP2 = T3, // scratch register (in addition to AT, reserved for assembler) enumerator
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 1839 Lwu(TMP2, base, offset + kMips64WordSize); in LoadFromOffset()
1840 Dinsu(reg, TMP2, 32, 32); in LoadFromOffset()
1868 Lw(TMP2, base, offset + kMips64WordSize); in LoadFpuFromOffset()
1869 Mthc1(TMP2, reg); in LoadFpuFromOffset()
1932 Dsrl32(TMP2, reg, 0); in StoreToOffset()
1933 Sw(TMP2, base, offset + kMips64WordSize); in StoreToOffset()
1962 Mfhc1(TMP2, reg); in StoreFpuToOffset()
1964 Sw(TMP2, base, offset + kMips64WordSize); in StoreFpuToOffset()
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.cc | 907 blocked_core_registers_[TMP2] = true; in SetupBlockedRegisters()
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