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Searched refs:core_spill_mask_ (Results 1 – 6 of 6) sorted by relevance

/art/runtime/quick/
Dquick_method_frame_info.h30 core_spill_mask_(0u), in QuickMethodFrameInfo()
37 core_spill_mask_(core_spill_mask), in QuickMethodFrameInfo()
46 return core_spill_mask_; in CoreSpillMask()
59 uint32_t core_spill_mask_; variable
/art/compiler/optimizing/
Dcode_generator.h217 uint32_t GetCoreSpillMask() const { return core_spill_mask_; } in GetCoreSpillMask()
225 core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_; in ComputeSpillMask()
226 DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved"; in ComputeSpillMask()
500 core_spill_mask_(0), in CodeGenerator()
542 return POPCOUNT(core_spill_mask_) * GetWordSize(); in GetCoreSpillSize()
584 uint32_t core_spill_mask_; variable
Dcode_generator_arm.cc871 core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_; in ComputeSpillMask()
872 DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved"; in ComputeSpillMask()
875 core_spill_mask_ |= (1 << kCoreAlwaysSpillRegister); in ComputeSpillMask()
914 __ PushList(core_spill_mask_); in GenerateFrameEntry()
915 __ cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(core_spill_mask_)); in GenerateFrameEntry()
916 __ cfi().RelOffsetForMany(DWARFReg(kMethodRegisterArgument), 0, core_spill_mask_, kArmWordSize); in GenerateFrameEntry()
945 DCHECK_NE(core_spill_mask_ & (1 << LR), 0U); in GenerateFrameExit()
946 uint32_t pop_mask = (core_spill_mask_ & (~(1 << LR))) | 1 << PC; in GenerateFrameExit()
Dcode_generator_arm64.cc1047 DCHECK(ArtVixlRegCodeCoherentForRegSet(core_spill_mask_, GetNumberOfCoreRegisters(), 0, 0)); in GetFramePreservedCoreRegisters()
1049 core_spill_mask_); in GetFramePreservedCoreRegisters()
/art/compiler/
Dcompiled_method.cc113 frame_size_in_bytes_(frame_size_in_bytes), core_spill_mask_(core_spill_mask), in CompiledMethod()
Dcompiled_method.h405 return core_spill_mask_; in GetCoreSpillMask()
432 const uint32_t core_spill_mask_; variable