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/external/llvm/test/CodeGen/AArch64/
Demutls.ll2 ; RUN: -relocation-model=pic < %s | FileCheck -check-prefix=ARM64 %s
11 ; ARM64-LABEL: my_get_xyz:
12 ; ARM64: adrp x0, :got:my_emutls_v_xyz
13 ; ARM64-NEXT: ldr x0, [x0, :got_lo12:my_emutls_v_xyz]
14 ; ARM64-NEXT: bl my_emutls_get_address
15 ; ARM64-NEXT: ldr w0, [x0]
16 ; ARM64-NEXT: ldp x29, x30, [sp]
34 ; ARM64-LABEL: f1:
35 ; ARM64: adrp x0, :got:__emutls_v.i1
36 ; ARM64-NEXT: ldr x0, [x0, :got_lo12:__emutls_v.i1]
[all …]
Darm64-fast-isel-intrinsic.ll1 … -relocation-model=dynamic-no-pic -mtriple=arm64-apple-ios < %s | FileCheck %s --check-prefix=ARM64
7 ; ARM64-LABEL: t1
8 ; ARM64: adrp x8, _message@PAGE
9 ; ARM64: add x0, x8, _message@PAGEOFF
10 ; ARM64: mov w9, wzr
11 ; ARM64: movz x2, #0x50
12 ; ARM64: uxtb w1, w9
13 ; ARM64: bl _memset
21 ; ARM64-LABEL: t2
22 ; ARM64: adrp x8, _temp@GOTPAGE
[all …]
Dalloca.ll2 …-post-ra -mattr=-fp-armv8 -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOFP-ARM64 %s
88 ; CHECK-NOFP-ARM64: stp x29, x30, [sp, #-16]!
89 ; CHECK-NOFP-ARM64: mov x29, sp
90 ; CHECK-NOFP-ARM64: sub sp, sp, #64
91 ; CHECK-NOFP-ARM64: stp x6, x7, [x29, #-16]
93 ; CHECK-NOFP-ARM64: stp x4, x5, [x29, #-32]
95 ; CHECK-NOFP-ARM64: stp x2, x3, [x29, #-48]
97 ; CHECK-NOFP-ARM64: mov x8, sp
110 ; CHECK-NOFP-ARM64: mov sp, x29
111 ; CHECK-NOFP-ARM64: ldp x29, x30, [sp], #16
Dlocal_vars.ll2 …%s -mtriple=aarch64-none-linux-gnu -disable-fp-elim | FileCheck -check-prefix CHECK-WITHFP-ARM64 %s
32 ; CHECK-WITHFP-ARM64-LABEL: trivial_fp_func:
33 ; CHECK-WITHFP-ARM64: stp x29, x30, [sp, #-16]!
34 ; CHECK-WITHFP-ARM64-NEXT: mov x29, sp
Dfp-cond-sel.ll23 ; FLT0 is reused from above on ARM64.
Darm64-memset-to-bzero.ll5 ; <rdar://problem/14199482> ARM64: Calls to bzero() replaced with calls to memset()
Darm64-misched-basic-A53.ll114 ; [ARM64] Cortex-a53 schedule mode can't handle NEON post-increment load
/external/llvm/test/Transforms/CodeGenPrepare/AArch64/
Dwiden_switch.ll3 …N: opt < %s -codegenprepare -S -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefix=ARM64
28 ; ARM64-LABEL: @widen_switch_i16(
29 ; ARM64: %0 = zext i16 %trunc to i32
30 ; ARM64-NEXT: switch i32 %0, label %sw.default [
31 ; ARM64-NEXT: i32 1, label %return
32 ; ARM64-NEXT: i32 65535, label %sw.bb1
58 ; ARM64-LABEL: @widen_switch_i17(
59 ; ARM64: %0 = zext i17 %trunc to i32
60 ; ARM64-NEXT: switch i32 %0, label %sw.default [
61 ; ARM64-NEXT: i32 10, label %return
[all …]
/external/llvm/test/tools/dsymutil/
Darch-option.test4 …-dump-debug-map %p/Inputs/fat-test.arm.dylib | FileCheck %s -check-prefix=ARM64 -check-prefix=ARMV…
5 …g-map %p/Inputs/fat-test.arm.dylib -arch all | FileCheck %s -check-prefix=ARM64 -check-prefix=ARMV…
6 …g-map %p/Inputs/fat-test.arm.dylib -arch='*' | FileCheck %s -check-prefix=ARM64 -check-prefix=ARMV…
7 …map %p/Inputs/fat-test.arm.dylib -arch arm64 | FileCheck %s -check-prefix=ARM64 -check-prefix=CHECK
10 …/fat-test.arm.dylib -arch arm64 -arch armv7s | FileCheck %s -check-prefix=ARM64 -check-prefix=ARMV…
29 ARM64: ---
30 ARM64-NOT: ...
31 ARM64: triple: 'arm64-apple-darwin'
32 ARM64-NOT: ...
33 ARM64: sym: _arm64_var
[all …]
/external/clang/test/CodeGenObjC/
Dstret.m3 …clang_cc1 -fblocks -triple arm64-apple-darwin %s -emit-llvm -o - | FileCheck %s -check-prefix=ARM64
5 // <rdar://problem/9757015>: Don't use 'stret' variants on ARM64.
13 // ARM64: @main
14 // ARM64-NOT: @objc_msgSend_stret
Darc-arm.m4 // <rdar://12438598>: use an autorelease marker on ARM64.
/external/valgrind/VEX/auxprogs/
Dgenoffsets.c165 GENOFFSET(ARM64,arm64,X0); in foo()
166 GENOFFSET(ARM64,arm64,X1); in foo()
167 GENOFFSET(ARM64,arm64,X2); in foo()
168 GENOFFSET(ARM64,arm64,X3); in foo()
169 GENOFFSET(ARM64,arm64,X4); in foo()
170 GENOFFSET(ARM64,arm64,X5); in foo()
171 GENOFFSET(ARM64,arm64,X6); in foo()
172 GENOFFSET(ARM64,arm64,X7); in foo()
173 GENOFFSET(ARM64,arm64,X8); in foo()
174 GENOFFSET(ARM64,arm64,XSP); in foo()
[all …]
/external/compiler-rt/cmake/
Dconfig-ix.cmake256 set(ARM64 aarch64) variable
265 set(ARM64 arm64) variable
270 set(ALL_BUILTIN_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64}
273 ${ARM32} ${ARM64} ${MIPS32} ${MIPS64})
274 set(ALL_ASAN_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64}
276 set(ALL_DFSAN_SUPPORTED_ARCH ${X86_64} ${MIPS64} ${ARM64})
277 set(ALL_LSAN_SUPPORTED_ARCH ${X86_64} ${MIPS64} ${ARM64})
278 set(ALL_MSAN_SUPPORTED_ARCH ${X86_64} ${MIPS64} ${ARM64})
279 set(ALL_PROFILE_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64} ${PPC64}
281 set(ALL_TSAN_SUPPORTED_ARCH ${X86_64} ${MIPS64} ${ARM64} ${PPC64})
[all …]
/external/llvm/test/MC/MachO/AArch64/
Dcstexpr-gotpcrel.ll49 ; supported on x86-64 but not on ARM64
82 ; Check that these got equivalent symbols are emitted on ARM64. Since ARM64
/external/valgrind/coregrind/
Dpub_core_basics.h84 } ARM64; member
Dm_libcassert.c160 (srP)->misc.ARM64.x29 = block[2]; \
161 (srP)->misc.ARM64.x30 = block[3]; \
Dm_stacktrace.c1127 uregs.x30 = startRegs->misc.ARM64.x30;
1128 uregs.x29 = startRegs->misc.ARM64.x29;
/external/llvm/test/MC/AArch64/
Darm64-separator.s3 ; ARM64 uses a multi-character statement separator, "%%". Check that we lex
/external/llvm/test/Transforms/LoopStrengthReduce/AArch64/
Dlsr-memcpy.ll6 ; <rdar://problem/12702735> [ARM64][coalescer] need better register
Dlsr-memset.ll8 ; <rdar://problem/12702735> [ARM64][coalescer] need better register
/external/google-breakpad/src/common/
Ddwarf_cfi_to_module.h113 static vector<string> ARM64();
Ddwarf_cfi_to_module.cc109 vector<string> DwarfCFIToModule::RegisterNames::ARM64() { in ARM64() function in google_breakpad::DwarfCFIToModule::RegisterNames
/external/valgrind/
DREADME.android87 # For ARM64 (AArch64)
126 # for ARM64 (AArch64)
149 # For ARM64 (AArch64):
/external/llvm/test/tools/llvm-objdump/AArch64/
Dmacho-private-headers.test7 CHECK: MH_MAGIC_64 ARM64 ALL 0x00 OBJECT 4 352 SUBSECTIONS_VIA_SYMBOLS
82 EXE: MH_MAGIC_64 ARM64 ALL 0x00 EXECUTE 17 1240 NOUNDEFS DYLDLINK TWOLEVEL…
/external/llvm/test/Transforms/InstCombine/
D2012-04-23-Neon-Intrinsics.ll67 ; ARM64 variants - <rdar://problem/12349617>

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