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Searched refs:ATOMIC_LOAD_XOR (Results 1 – 16 of 16) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h723 ATOMIC_LOAD_XOR, enumerator
DSelectionDAGNodes.h1203 N->getOpcode() == ISD::ATOMIC_LOAD_XOR ||
1322 N->getOpcode() == ISD::ATOMIC_LOAD_XOR ||
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp71 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; in getOperationName()
DLegalizeIntegerTypes.cpp141 case ISD::ATOMIC_LOAD_XOR: in PromoteIntegerResult()
1336 case ISD::ATOMIC_LOAD_XOR: in ExpandIntegerResult()
DSelectionDAG.cpp495 case ISD::ATOMIC_LOAD_XOR: in AddNodeIDCustom()
4894 Opcode == ISD::ATOMIC_LOAD_XOR || in getAtomic()
DLegalizeDAG.cpp3990 case ISD::ATOMIC_LOAD_XOR: in ConvertNodeToLibcall()
DSelectionDAGBuilder.cpp3518 case AtomicRMWInst::Xor: NT = ISD::ATOMIC_LOAD_XOR; break; in visitAtomicRMW()
/external/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp140 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, Expand); in Mips16TargetLowering()
/external/llvm/lib/Target/Sparc/
DSparcInstr64Bit.td531 defm ATOMIC_LOAD_XOR : AtomicRMW<atomic_load_xor_32, atomic_load_xor_64>;
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp281 setTargetDAGCombine(ISD::ATOMIC_LOAD_XOR); in SITargetLowering()
2124 case ISD::ATOMIC_LOAD_XOR: in PerformDAGCombine()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1933 case ISD::ATOMIC_LOAD_XOR: in selectAtomicLoadArith()
2310 case ISD::ATOMIC_LOAD_XOR: in Select()
DX86ISelLowering.cpp20364 case ISD::ATOMIC_LOAD_XOR: in ReplaceNodeResults()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp681 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_XOR, SYNC_FETCH_AND_XOR) in getATOMIC()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td496 def atomic_load_xor : SDNode<"ISD::ATOMIC_LOAD_XOR" , SDTAtomic2,
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp211 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, Custom); in SystemZTargetLowering()
4371 case ISD::ATOMIC_LOAD_XOR: in LowerOperation()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp865 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, Expand); in ARMTargetLowering()