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Searched refs:BITCAST (Results 1 – 25 of 39) sorted by relevance

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/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp63 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
64 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
75 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
76 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
89 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
90 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
100 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
101 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
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DLegalizeVectorOps.cpp418 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); in Promote()
429 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in Promote()
772 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1); in ExpandSELECT()
773 Op2 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op2); in ExpandSELECT()
782 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val); in ExpandSELECT()
826 ISD::BITCAST, DL, VT, in ExpandANY_EXTEND_VECTOR_INREG()
880 return DAG.getNode(ISD::BITCAST, DL, VT, in ExpandZERO_EXTEND_VECTOR_INREG()
901 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0)); in ExpandBSWAP()
904 return DAG.getNode(ISD::BITCAST, DL, VT, Op); in ExpandBSWAP()
960 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1); in ExpandVSELECT()
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DLegalizeVectorTypes.cpp52 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break; in ScalarizeVectorResult()
168 return DAG.getNode(ISD::BITCAST, SDLoc(N), in ScalarizeVecRes_BITCAST()
433 case ISD::BITCAST: in ScalarizeVectorOperand()
483 return DAG.getNode(ISD::BITCAST, SDLoc(N), in ScalarizeVecOp_BITCAST()
597 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break; in SplitVectorResult()
762 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
763 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); in SplitVecRes_BITCAST()
771 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
772 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); in SplitVecRes_BITCAST()
786 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
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DLegalizeDAG.cpp333 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val); in ExpandUnalignedStore()
458 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); in ExpandUnalignedLoad()
771 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value); in LegalizeStoreOps()
938 RVal = DAG.getNode(ISD::BITCAST, dl, VT, Res); in LegalizeLoadOps()
1654 State.IntValue = DAG.getNode(ISD::BITCAST, DL, IVT, Value); in getSignAsIntValue()
1699 return DAG.getNode(ISD::BITCAST, DL, State.FloatVT, NewIntValue); in modifySignAsInt()
2606 SDValue LoFlt = DAG.getNode(ISD::BITCAST, dl, MVT::f64, LoOr); in ExpandLegalINT_TO_FP()
2607 SDValue HiFlt = DAG.getNode(ISD::BITCAST, dl, MVT::f64, HiOr); in ExpandLegalINT_TO_FP()
3104 case ISD::BITCAST: in ExpandNode()
3188 Tmp1 = DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0), in ExpandNode()
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DSelectionDAGBuilder.cpp147 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
148 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
181 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]); in getCopyFromParts()
182 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]); in getCopyFromParts()
233 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in getCopyFromParts()
327 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in getCopyFromPartsVector()
340 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in getCopyFromPartsVector()
399 Val = DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in getCopyToParts()
407 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in getCopyToParts()
412 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in getCopyToParts()
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DDAGCombiner.cpp1407 case ISD::BITCAST: return visitBITCAST(N); in visit()
2770 if ((N0.getOpcode() == ISD::BITCAST || in SimplifyBinOpWithSameOpcodeHands()
7071 SDValue V = DAG.getNode(ISD::BITCAST, SDLoc(N), in visitTRUNCATE()
7099 N0.getOpcode() == ISD::BITCAST && N0.hasOneUse() && in visitTRUNCATE()
7284 return DAG.getNode(ISD::BITCAST, SDLoc(N), VT, N0); in visitBITCAST()
7288 if (N0.getOpcode() == ISD::BITCAST) in visitBITCAST()
7289 return DAG.getNode(ISD::BITCAST, SDLoc(N), VT, in visitBITCAST()
7333 SDValue NewConv = DAG.getNode(ISD::BITCAST, SDLoc(N0), VT, in visitBITCAST()
7387 SDValue X = DAG.getNode(ISD::BITCAST, SDLoc(N0), in visitBITCAST()
7411 SDValue Cst = DAG.getNode(ISD::BITCAST, SDLoc(N0.getOperand(0)), VT, in visitBITCAST()
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DLegalizeFloatTypes.cpp71 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N, ResNo); break; in SoftenFloatResult()
737 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break; in SoftenFloatOperand()
780 case ISD::BITCAST: in CanSkipSoftenFloatOperand()
809 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), in SoftenFloatOp_BITCAST()
991 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break; in ExpandFloatResult()
1484 case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break; in ExpandFloatOperand()
1727 case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break; in PromoteFloatOperand()
1844 case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break; in PromoteFloatResult()
DLegalizeTypes.cpp911 return DAG.getNode(ISD::BITCAST, SDLoc(Op), in BitConvertToInteger()
922 return DAG.getNode(ISD::BITCAST, SDLoc(Op), in BitConvertVectorToIntegerVector()
/external/llvm/test/CodeGen/X86/
Dvshift-6.ll12 ; B = BITCAST MVT::v16i8, A
16 ; D = BITCAST MVT::v16i8, C
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp890 setOperationAction(ISD::BITCAST, MVT::i64, Custom); in ARMTargetLowering()
1497 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
1646 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2300 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
2415 } else if (Copy->getOpcode() == ISD::BITCAST) { in isUsedByReturnOnly()
3192 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3276 } else if (Op->getOpcode() == ISD::BITCAST && in isFloatingPointZero()
3986 bool InGPR = Tmp0.getOpcode() == ISD::BITCAST || in LowerFCOPYSIGN()
3998 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
4006 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
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/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp287 setOperationAction(ISD::BITCAST, VT, Legal); in SystemZTargetLowering()
425 setOperationAction(ISD::BITCAST, MVT::i32, Custom); in SystemZTargetLowering()
426 setOperationAction(ISD::BITCAST, MVT::f32, Custom); in SystemZTargetLowering()
826 Value = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Value); in convertLocVTToValVT()
849 Value = DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, Value); in convertValVTToLocVT()
2297 Mask = DAG.getNode(ISD::BITCAST, DL, VT, Mask); in lowerVectorSETCC()
2669 SDValue Out64 = DAG.getNode(ISD::BITCAST, DL, MVT::f64, In64); in lowerBITCAST()
2677 SDValue Out64 = DAG.getNode(ISD::BITCAST, DL, MVT::i64, In64); in lowerBITCAST()
2967 Op = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, Op); in lowerCTPOP()
2973 Op = DAG.getNode(ISD::BITCAST, DL, VT, Op); in lowerCTPOP()
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/external/llvm/lib/Target/Mips/
DMipsSEISelDAGToDAG.cpp526 if (N->getOpcode() == ISD::BITCAST) in selectVSplatCommon()
602 if (N->getOpcode() == ISD::BITCAST) in selectVSplatUimmPow2()
633 if (N->getOpcode() == ISD::BITCAST) in selectVSplatMaskL()
667 if (N->getOpcode() == ISD::BITCAST) in selectVSplatMaskR()
689 if (N->getOpcode() == ISD::BITCAST) in selectVSplatUimmInvPow2()
DMipsISelLowering.cpp1926 DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(0)) : in lowerFCOPYSIGN32()
1930 DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(1)) : in lowerFCOPYSIGN32()
1953 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), Res); in lowerFCOPYSIGN32()
1970 SDValue X = DAG.getNode(ISD::BITCAST, DL, TyX, Op.getOperand(0)); in lowerFCOPYSIGN64()
1971 SDValue Y = DAG.getNode(ISD::BITCAST, DL, TyY, Op.getOperand(1)); in lowerFCOPYSIGN64()
1987 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), I); in lowerFCOPYSIGN64()
2008 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), Or); in lowerFCOPYSIGN64()
2347 return DAG.getNode(ISD::BITCAST, SDLoc(Op), Op.getValueType(), Trunc); in lowerFP_TO_SINT()
2673 Arg = DAG.getNode(ISD::BITCAST, DL, LocVT, Arg); in LowerCall()
2690 Arg = DAG.getNode(ISD::BITCAST, DL, LocVT, Arg); in LowerCall()
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DMipsSEISelLowering.cpp73 setOperationAction(ISD::BITCAST, VecTys[i], Legal); in MipsSETargetLowering()
253 setOperationAction(ISD::BITCAST, Ty, Legal); in addMSAIntType()
304 setOperationAction(ISD::BITCAST, Ty, Legal); in addMSAFloatType()
623 if (N->getOpcode() == ISD::BITCAST) in isVectorAllOnes()
1408 Result = DAG.getNode(ISD::BITCAST, DL, ResVecTy, Result); in lowerMSASplatZExt()
1449 Result = DAG.getNode(ISD::BITCAST, DL, VecTy, Result); in getBuildVectorSplat()
1475 DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, in lowerMSABinaryBitImmIntr()
2394 Result = DAG.getNode(ISD::BITCAST, SDLoc(Node), ResTy, Result); in lowerBUILD_VECTOR()
/external/llvm/test/CodeGen/Hexagon/vect/
Dvect-bitcast.ll3 ; Used to fail with "Cannot BITCAST between types of different sizes!"
Dvect-bitcast-1.ll3 …`VT.getSizeInBits() == Operand.getValueType().getSizeInBits() && "Cannot BITCAST between types of …
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h486 BITCAST, enumerator
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp447 setOperationAction(ISD::BITCAST, MVT::i16, Custom); in AArch64TargetLowering()
448 setOperationAction(ISD::BITCAST, MVT::f16, Custom); in AArch64TargetLowering()
493 setTargetDAGCombine(ISD::BITCAST); in AArch64TargetLowering()
2011 Op = DAG.getNode(ISD::BITCAST, DL, MVT::f32, Op); in LowerBITCAST()
2205 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
2207 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()
2241 case ISD::BITCAST: in LowerOperation()
2465 ArgValue = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
2679 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); in LowerCallResult()
3019 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall()
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/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp452 WholeValue = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), WholeValue); in LowerFormalArguments_32()
460 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg); in LowerFormalArguments_32()
511 WholeValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), WholeValue); in LowerFormalArguments_32()
823 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall_32()
865 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::v2i32, Arg); in LowerCall_32()
917 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Arg); in LowerCall_32()
1180 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall_64()
1534 setOperationAction(ISD::BITCAST, MVT::f32, Expand); in SparcTargetLowering()
1535 setOperationAction(ISD::BITCAST, MVT::i32, Expand); in SparcTargetLowering()
1567 setOperationAction(ISD::BITCAST, MVT::f64, Expand); in SparcTargetLowering()
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/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp259 setOperationAction(ISD::BITCAST, MVT::f32, Legal); in PPCTargetLowering()
260 setOperationAction(ISD::BITCAST, MVT::i32, Legal); in PPCTargetLowering()
261 setOperationAction(ISD::BITCAST, MVT::i64, Legal); in PPCTargetLowering()
262 setOperationAction(ISD::BITCAST, MVT::f64, Legal); in PPCTargetLowering()
264 setOperationAction(ISD::BITCAST, MVT::f32, Expand); in PPCTargetLowering()
265 setOperationAction(ISD::BITCAST, MVT::i32, Expand); in PPCTargetLowering()
266 setOperationAction(ISD::BITCAST, MVT::i64, Expand); in PPCTargetLowering()
267 setOperationAction(ISD::BITCAST, MVT::f64, Expand); in PPCTargetLowering()
2248 return DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, in LowerSETCC()
2250 DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(0)), in LowerSETCC()
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/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1359 Result = DAG.getNode(ISD::BITCAST, DL, VT, Result); in LowerLOAD()
2203 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in LowerVECTOR_SHIFT()
2341 return DAG.getNode(ISD::BITCAST, dl, VT, ConstVal); in LowerBUILD_VECTOR()
2368 SDValue B0 = DAG.getNode(ISD::BITCAST, dl, OpTy, Vec0); in LowerCONCAT_VECTORS()
2369 SDValue B1 = DAG.getNode(ISD::BITCAST, dl, OpTy, Vec1); in LowerCONCAT_VECTORS()
2371 return DAG.getNode(ISD::BITCAST, dl, VT, VC); in LowerCONCAT_VECTORS()
2402 return DAG.getNode(ISD::BITCAST, dl, VT, V); in LowerCONCAT_VECTORS()
2456 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerEXTRACT_VECTOR()
2476 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerEXTRACT_VECTOR()
2504 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerINSERT_VECTOR()
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/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp211 case ISD::BITCAST: in SITargetLowering()
1391 SDValue LHS = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, Op.getOperand(1)); in LowerSELECT()
1392 SDValue RHS = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, Op.getOperand(2)); in LowerSELECT()
1405 return DAG.getNode(ISD::BITCAST, DL, MVT::i64, Res); in LowerSELECT()
1532 SDValue NumBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X); in LowerFDIV64()
1533 SDValue DenBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Y); in LowerFDIV64()
1534 SDValue Scale0BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale0); in LowerFDIV64()
1535 SDValue Scale1BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale1); in LowerFDIV64()
DAMDGPUISelLowering.cpp1964 SDValue VecSrc = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); in LowerFTRUNC()
1981 SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64); in LowerFTRUNC()
1983 SDValue BcInt = DAG.getNode(ISD::BITCAST, SL, MVT::i64, Src); in LowerFTRUNC()
2002 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2); in LowerFTRUNC()
2072 SDValue L = DAG.getNode(ISD::BITCAST, SL, MVT::i64, X); in LowerFROUND64()
2081 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X); in LowerFROUND64()
2106 K = DAG.getNode(ISD::BITCAST, SL, MVT::f64, K); in LowerFROUND64()
2167 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); in LowerINT_TO_FP64()
2247 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Result); in LowerFP64_TO_INT()
2385 SDValue CastLoad = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad.getValue(0)); in performStoreCombine()
DR600ISelLowering.cpp1210 True = DAG.getNode(ISD::BITCAST, DL, CompareVT, True); in LowerSELECT_CC()
1211 False = DAG.getNode(ISD::BITCAST, DL, CompareVT, False); in LowerSELECT_CC()
1230 return DAG.getNode(ISD::BITCAST, DL, VT, SelectNode); in LowerSELECT_CC()
1943 if (Arg.getOpcode() == ISD::BITCAST && in PerformDAGCombine()
1947 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getVTList(), in PerformDAGCombine()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp260 setOperationAction(ISD::BITCAST , MVT::f32 , Expand); in X86TargetLowering()
261 setOperationAction(ISD::BITCAST , MVT::i32 , Expand); in X86TargetLowering()
263 setOperationAction(ISD::BITCAST , MVT::f64 , Expand); in X86TargetLowering()
265 setOperationAction(ISD::BITCAST , MVT::i64 , Expand); in X86TargetLowering()
789 setOperationAction(ISD::BITCAST, MMXTy, Expand); in X86TargetLowering()
952 setOperationAction(ISD::BITCAST, MVT::v2i32, Custom); in X86TargetLowering()
953 setOperationAction(ISD::BITCAST, MVT::v4i16, Custom); in X86TargetLowering()
954 setOperationAction(ISD::BITCAST, MVT::v8i8, Custom); in X86TargetLowering()
1796 setTargetDAGCombine(ISD::BITCAST); in X86TargetLowering()
4797 while (MaskNode->getOpcode() == ISD::BITCAST) in getTargetShuffleMask()
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