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Searched refs:Disp (Results 1 – 25 of 32) sorted by relevance

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/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp59 int64_t Disp; member
64 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
90 errs() << " Disp " << Disp; in dump()
157 SDValue &Base, SDValue &Disp) const;
159 SDValue &Base, SDValue &Disp, SDValue &Index) const;
165 SDValue &Base, SDValue &Disp) const;
171 SDValue &Base, SDValue &Disp) const;
178 SDValue &Base, SDValue &Disp, SDValue &Index) const;
190 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
191 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
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DSystemZOperands.td76 let Name = format##bitsize##"Disp"##dispsize##length;
91 "decode"##format##bitsize##"Disp"##dispsize##length##"Operand";
94 !cast<AddressAsmOperand>(format##bitsize##"Disp"##dispsize##length);
DSystemZISelLowering.cpp4926 int64_t Disp = MI->getOperand(2).getImm(); in emitCondStore() local
4932 StoreOpcode = TII->getOpcodeForOffset(StoreOpcode, Disp); in emitCondStore()
4941 .addReg(SrcReg).addOperand(Base).addImm(Disp) in emitCondStore()
4969 .addReg(SrcReg).addOperand(Base).addImm(Disp).addReg(IndexReg); in emitCondStore()
4999 int64_t Disp = MI->getOperand(2).getImm(); in emitAtomicLoadBinary() local
5015 LOpcode = TII->getOpcodeForOffset(LOpcode, Disp); in emitAtomicLoadBinary()
5016 CSOpcode = TII->getOpcodeForOffset(CSOpcode, Disp); in emitAtomicLoadBinary()
5038 .addOperand(Base).addImm(Disp).addReg(0); in emitAtomicLoadBinary()
5087 .addReg(OldVal).addReg(NewVal).addOperand(Base).addImm(Disp); in emitAtomicLoadBinary()
5118 int64_t Disp = MI->getOperand(2).getImm(); in emitAtomicLoadMinMax() local
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp152 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
153 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
154 return (Base << 12) | Disp; in getBDAddr12Encoding()
162 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
163 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
164 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
172 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
174 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
175 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
183 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
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/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp48 int16_t Disp; member
57 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr), in MSP430ISelAddressMode()
73 errs() << " Disp " << Disp << '\n'; in dump()
119 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
145 AM.Disp += G->getOffset(); in MatchWrapper()
150 AM.Disp += CP->getOffset(); in MatchWrapper()
187 AM.Disp += Val; in MatchAddress()
230 AM.Disp += Offset; in MatchAddress()
245 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
264 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
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DMSP430AsmPrinter.cpp108 const MachineOperand &Disp = MI->getOperand(OpNum+1); in printSrcMemOperand() local
113 if (Disp.isImm() && !Base.getReg()) in printSrcMemOperand()
/external/v8/src/s390/
Dassembler-s390.h332 typedef int32_t Disp; typedef
341 explicit MemOperand(Register rx, Disp offset = 0);
342 explicit MemOperand(Register rx, Register rb, Disp offset = 0);
636 void name(Register r1, Register x2, Register b2, Disp d2); \
655 void name(Register r1, Register b2, Register x2, Disp d2)
659 void name(Register r1, Register r3, Register b2, Register x2, Disp d2)
662 void name(Register r1, Register x2, Register b2, Disp d2); \
668 void name(Register r1, Condition m3, Register b4, Disp d4, \
675 void name(const Operand& i2, Register b1, Disp d1)
678 void name(Register b1, Disp d1, const Operand& i2); \
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Dassembler-s390.cc627 void Assembler::name(Register r1, Register x2, Register b2, Disp d2) { \
631 Disp d2) { in rx_form()
639 Disp d2) { in rx_form()
796 void Assembler::name(Register r1, Register r3, Register b2, Disp d2) { \
804 const Disp d2) { in rs_form()
816 void Assembler::name(Register r1, Condition m3, Register b2, Disp d2) { \
824 const Disp d2) { in rs_form()
852 void Assembler::name(Length l1, Register b2, Disp d2) { \
856 void Assembler::rsl_form(Opcode op, Length l1, Register b2, Disp d2) { in rsl_form()
872 void Assembler::name(Register r1, Register r3, Register b2, Disp d2) { \
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/external/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp65 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
78 if (Disp.isExpr()) in printSrcMemOperand()
79 Disp.getExpr()->print(O, &MAI); in printSrcMemOperand()
81 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
82 O << Disp.getImm(); in printSrcMemOperand()
/external/llvm/lib/Target/X86/
DX86InstrBuilder.h50 int Disp; member
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
77 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
136 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
138 MIB.addImm(AM.Disp); in addFullAddress()
DX86ISelDAGToDAG.cpp63 int32_t Disp; member
75 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), in X86ISelAddressMode()
118 dbgs() << " Disp " << Disp << '\n' in dump()
212 SDValue &Scale, SDValue &Index, SDValue &Disp,
215 SDValue &Scale, SDValue &Index, SDValue &Disp,
219 SDValue &Scale, SDValue &Index, SDValue &Disp,
222 SDValue &Scale, SDValue &Index, SDValue &Disp,
225 SDValue &Scale, SDValue &Index, SDValue &Disp,
229 SDValue &Index, SDValue &Disp,
235 SDValue &Index, SDValue &Disp,
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DX86FastISel.cpp749 uint64_t Disp = (int32_t)AM.Disp + (uint64_t)CI->getSExtValue(); in X86SelectAddress() local
751 if (isInt<32>(Disp)) { in X86SelectAddress()
752 AM.Disp = (uint32_t)Disp; in X86SelectAddress()
763 uint64_t Disp = (int32_t)AM.Disp; in X86SelectAddress() local
774 Disp += SL->getElementOffset(cast<ConstantInt>(Op)->getZExtValue()); in X86SelectAddress()
784 Disp += CI->getSExtValue() * S; in X86SelectAddress()
791 Disp += CI->getSExtValue() * S; in X86SelectAddress()
812 if (!isInt<32>(Disp)) in X86SelectAddress()
817 AM.Disp = (uint32_t)Disp; in X86SelectAddress()
2257 DestAM.Disp += Size; in TryEmitSmallMemcpy()
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/external/llvm/lib/Target/SystemZ/Disassembler/
DSystemZDisassembler.cpp230 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
233 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand()
240 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
243 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
251 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
254 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand()
263 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
266 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
275 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len8Operand() local
278 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len8Operand()
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/external/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp313 const MCExpr *Disp = MCConstantExpr::create(0, Ctx); in InstrumentMOVSBase() local
315 getPointerWidth(), 0, Disp, SrcReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
322 const MCExpr *Disp = MCConstantExpr::create(-1, Ctx); in InstrumentMOVSBase() local
324 getPointerWidth(), 0, Disp, SrcReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
332 const MCExpr *Disp = MCConstantExpr::create(0, Ctx); in InstrumentMOVSBase() local
334 getPointerWidth(), 0, Disp, DstReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
340 const MCExpr *Disp = MCConstantExpr::create(-1, Ctx); in InstrumentMOVSBase() local
342 getPointerWidth(), 0, Disp, DstReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
458 const MCConstantExpr *Disp = in ComputeMemOperandAddress() local
461 X86Operand::CreateMem(getPointerWidth(), 0, Disp, Reg, 0, 1, SMLoc(), in ComputeMemOperandAddress()
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DX86AsmParser.cpp694 bool ParseIntelDotOperator(const MCExpr *Disp, const MCExpr *&NewDisp);
713 CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg,
1014 const MCExpr *Disp = MCConstantExpr::create(0, getContext()); in DefaultMemSIOperand() local
1015 return X86Operand::CreateMem(getPointerWidth(), /*SegReg=*/0, Disp, in DefaultMemSIOperand()
1023 const MCExpr *Disp = MCConstantExpr::create(0, getContext()); in DefaultMemDIOperand() local
1024 return X86Operand::CreateMem(getPointerWidth(), /*SegReg=*/0, Disp, in DefaultMemDIOperand()
1068 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm() argument
1073 if (isa<MCSymbolRefExpr>(Disp) && Info.OpDecl && !Info.IsVarDecl) { in CreateMemForInlineAsm()
1083 return X86Operand::CreateMem(getPointerWidth(), Disp, Start, End, Size, in CreateMemForInlineAsm()
1090 const MCBinaryExpr *BinOp = dyn_cast<MCBinaryExpr>(Disp); in CreateMemForInlineAsm()
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DX86Operand.h54 const MCExpr *Disp; member
109 return Mem.Disp; in getMemDisp()
496 CreateMem(unsigned ModeSize, const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc,
501 Res->Mem.Disp = Disp;
515 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
528 Res->Mem.Disp = Disp;
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp62 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); in Is16BitMemOperand() local
65 Disp.isImm() && Disp.getImm() < 0x10000) in Is16BitMemOperand()
122 void EmitImmediate(const MCOperand &Disp, SMLoc Loc,
368 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); in EmitMemModRMByte() local
396 EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind), in EmitMemModRMByte()
440 if (Disp.isImm() && isDisp8(Disp.getImm())) { in EmitMemModRMByte()
441 if (Disp.getImm() == 0 && BaseRegNo != N86::EBP) { in EmitMemModRMByte()
448 EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups); in EmitMemModRMByte()
459 EmitImmediate(Disp, MI.getLoc(), 2, FK_Data_2, CurByte, OS, Fixups); in EmitMemModRMByte()
480 EmitImmediate(Disp, MI.getLoc(), 4, FK_Data_4, CurByte, OS, Fixups); in EmitMemModRMByte()
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/external/llvm/lib/Target/SystemZ/AsmParser/
DSystemZAsmParser.cpp100 const MCExpr *Disp; member
166 const MCExpr *Disp, unsigned Index, const MCExpr *Length, in createMem() argument
173 Op->Mem.Disp = Disp; in createMem()
245 return isMem(MemKind, RegKind) && inRange(Mem.Disp, 0, 0xfff); in isMemDisp12()
248 return isMem(MemKind, RegKind) && inRange(Mem.Disp, -524288, 524287); in isMemDisp20()
257 addExpr(Inst, Mem.Disp); in addBDVAddrOperands()
285 addExpr(Inst, Mem.Disp); in addBDAddrOperands()
291 addExpr(Inst, Mem.Disp); in addBDXAddrOperands()
298 addExpr(Inst, Mem.Disp); in addBDLAddrOperands()
374 bool parseAddress(unsigned &Base, const MCExpr *&Disp,
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/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h201 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
208 TargetFlags = Disp.getTargetFlags();
210 switch (Disp.getType()) {
214 return addImm(Disp.getImm() + off);
216 return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
219 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
/external/llvm/lib/Target/SystemZ/InstPrinter/
DSystemZInstPrinter.cpp24 void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp, in printAddress() argument
26 O << Disp; in printAddress()
198 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); in printBDLAddrOperand() local
200 O << Disp << '(' << Length; in printBDLAddrOperand()
DSystemZInstPrinter.h34 static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
/external/llvm/tools/llvm-objdump/
DCOFFDump.cpp227 uint64_t Offset, uint32_t Disp) { in printCOFFSymbolAddress() argument
231 if (Disp > 0) in printCOFFSymbolAddress()
232 Out << format(" + 0x%04x", Disp); in printCOFFSymbolAddress()
234 Out << format("0x%04x", Disp); in printCOFFSymbolAddress()
/external/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp321 uint64_t Disp = Imm & 0xFFFF; in decodeMemRIOperands() local
345 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands()
356 uint64_t Disp = Imm & 0x3FFF; in decodeMemRIXOperands() local
366 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands()
/external/llvm/lib/Target/Mips/
DMipsConstantIslandPass.cpp387 unsigned Disp, bool NegativeOK);
406 MachineInstr *CPEMI, unsigned Disp, bool NegOk,
410 bool isBBInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
/external/llvm/lib/Target/AArch64/
DAArch64BranchRelaxation.cpp93 bool isBlockInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);

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