| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 515 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator
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| D | BasicTTIImpl.h | 624 ISD = ISD::FCOS; in getIntrinsicInstrCost()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 160 case ISD::FCOS: return "fcos"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 82 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break; in SoftenFloatResult()
1004 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break; in ExpandFloatResult()
1853 case ISD::FCOS: in PromoteFloatResult()
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| D | LegalizeDAG.cpp | 2435 ? ISD::FCOS : ISD::FSIN; in useSinCos()
3369 case ISD::FCOS: { in ExpandNode()
3378 if (Node->getOpcode() == ISD::FCOS) in ExpandNode()
4041 case ISD::FCOS: in ConvertNodeToLibcall()
4447 case ISD::FCOS: in PromoteNode()
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| D | LegalizeVectorOps.cpp | 309 case ISD::FCOS: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 79 case ISD::FCOS: in ScalarizeVectorResult()
634 case ISD::FCOS: in SplitVectorResult()
2092 case ISD::FCOS: in WidenVectorResult()
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| D | SelectionDAGBuilder.cpp | 4769 case Intrinsic::cos: Opcode = ISD::FCOS; break; in visitIntrinsicCall()
5819 if (visitUnaryFloatCall(I, ISD::FCOS)) in visitCall()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 135 for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW, in WebAssemblyTargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 64 setOperationAction(ISD::FCOS, MVT::f32, Custom); in R600TargetLowering()
599 case ISD::FCOS: in LowerOperation()
968 case ISD::FCOS: in LowerTrig()
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| D | SIISelLowering.cpp | 81 setOperationAction(ISD::FCOS, MVT::f32, Custom); in SITargetLowering()
965 case ISD::FCOS: in LowerOperation()
1608 case ISD::FCOS: in LowerTrig()
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| D | AMDGPUISelLowering.cpp | 346 setOperationAction(ISD::FCOS, VT, Expand); in AMDGPUTargetLowering()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 152 setOperationAction(ISD::FCOS, MVT::f128, Expand); in AArch64TargetLowering()
267 setOperationAction(ISD::FCOS, MVT::f32, Expand); in AArch64TargetLowering()
268 setOperationAction(ISD::FCOS, MVT::f64, Expand); in AArch64TargetLowering()
289 setOperationAction(ISD::FCOS, MVT::f16, Promote); in AArch64TargetLowering()
331 setOperationAction(ISD::FCOS, MVT::v4f16, Expand); in AArch64TargetLowering()
361 setOperationAction(ISD::FCOS, MVT::v8f16, Expand); in AArch64TargetLowering()
534 setOperationAction(ISD::FCOS, MVT::v1f64, Expand); in AArch64TargetLowering()
649 setOperationAction(ISD::FCOS, VT.getSimpleVT(), Expand); in addTypeForNEON()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1617 setOperationAction(ISD::FCOS , MVT::f128, Expand); in SparcTargetLowering()
1622 setOperationAction(ISD::FCOS , MVT::f64, Expand); in SparcTargetLowering()
1627 setOperationAction(ISD::FCOS , MVT::f32, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1699 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in HexagonTargetLowering()
1759 ISD::FCOS, ISD::FPOWI, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 707 #define FCOS CHOICE(fcos, fcos, fcos) macro
1428 #define FCOS fcos macro
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 503 setOperationAction(ISD::FCOS, MVT::v2f64, Expand); in ARMTargetLowering()
521 setOperationAction(ISD::FCOS, MVT::v4f32, Expand); in ARMTargetLowering()
538 setOperationAction(ISD::FCOS, MVT::v2f32, Expand); in ARMTargetLowering()
662 setOperationAction(ISD::FCOS, MVT::f64, Expand); in ARMTargetLowering()
921 setOperationAction(ISD::FCOS, MVT::f32, Expand); in ARMTargetLowering()
922 setOperationAction(ISD::FCOS, MVT::f64, Expand); in ARMTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 432 def fcos : SDNode<"ISD::FCOS" , SDTFPUnaryOp>;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 361 setOperationAction(ISD::FCOS, MVT::f32, Expand); in MipsTargetLowering()
362 setOperationAction(ISD::FCOS, MVT::f64, Expand); in MipsTargetLowering()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 162 setOperationAction(ISD::FCOS , MVT::f64, Expand); in PPCTargetLowering()
168 setOperationAction(ISD::FCOS , MVT::f32, Expand); in PPCTargetLowering()
462 setOperationAction(ISD::FCOS, VT, Expand); in PPCTargetLowering()
696 setOperationAction(ISD::FCOS , MVT::v4f64, Expand); in PPCTargetLowering()
742 setOperationAction(ISD::FCOS , MVT::v4f32, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 548 setOperationAction(ISD::FCOS , MVT::f64, Expand); in X86TargetLowering()
551 setOperationAction(ISD::FCOS , MVT::f32, Expand); in X86TargetLowering()
578 setOperationAction(ISD::FCOS , MVT::f32, Expand); in X86TargetLowering()
590 setOperationAction(ISD::FCOS , MVT::f64, Expand); in X86TargetLowering()
607 setOperationAction(ISD::FCOS , MVT::f64, Expand); in X86TargetLowering()
608 setOperationAction(ISD::FCOS , MVT::f32, Expand); in X86TargetLowering()
656 setOperationAction(ISD::FCOS , MVT::f80, Expand); in X86TargetLowering()
706 setOperationAction(ISD::FCOS, VT, Expand); in X86TargetLowering()
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1376 setOperationAction(ISD::FCOS, MVT::f32, Expand);
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 369 setOperationAction(ISD::FCOS, VT, Expand); in SystemZTargetLowering()
|