| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 517 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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| D | BasicTTIImpl.h | 669 ISD = ISD::FROUND; in getIntrinsicInstrCost()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 307 case Intrinsic::round: Opcode = ISD::FROUND; break; in mightUseCTR()
362 Opcode = ISD::FROUND; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 199 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
204 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
576 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in PPCTargetLowering()
578 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
786 setOperationAction(ISD::FROUND, MVT::v4f64, Legal); in PPCTargetLowering()
791 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstrInfo.td | 186 def AMDGPUround : SDNode<"ISD::FROUND",
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| D | AMDGPUISelLowering.cpp | 95 setOperationAction(ISD::FROUND, MVT::f32, Custom); in AMDGPUTargetLowering()
96 setOperationAction(ISD::FROUND, MVT::f64, Custom); in AMDGPUTargetLowering()
630 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 167 case ISD::FROUND: return "fround"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 101 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; in SoftenFloatResult()
1020 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; in ExpandFloatResult()
1863 case ISD::FROUND: in PromoteFloatResult()
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| D | LegalizeVectorOps.cpp | 321 case ISD::FROUND: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 92 case ISD::FROUND: in ScalarizeVectorResult()
648 case ISD::FROUND: in SplitVectorResult()
2102 case ISD::FROUND: in WidenVectorResult()
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| D | LegalizeDAG.cpp | 4102 case ISD::FROUND: in ConvertNodeToLibcall()
4442 case ISD::FROUND: in PromoteNode()
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| D | SelectionDAGBuilder.cpp | 4775 case Intrinsic::round: Opcode = ISD::FROUND; break; in visitIntrinsicCall()
5858 if (visitUnaryFloatCall(I, ISD::FROUND)) in visitCall()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 809 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
852 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 303 setOperationAction(ISD::FROUND, MVT::f16, Promote); in AArch64TargetLowering()
339 setOperationAction(ISD::FROUND, MVT::v4f16, Expand); in AArch64TargetLowering()
371 setOperationAction(ISD::FROUND, MVT::v8f16, Expand); in AArch64TargetLowering()
396 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
543 setOperationAction(ISD::FROUND, MVT::v1f64, Expand); in AArch64TargetLowering()
622 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 441 def frnd : SDNode<"ISD::FROUND" , SDTFPUnaryOp>;
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 364 setOperationAction(ISD::FROUND, VT, Legal); in SystemZTargetLowering()
403 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in SystemZTargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1761 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 975 setOperationAction(ISD::FROUND, MVT::f32, Legal); in ARMTargetLowering()
989 setOperationAction(ISD::FROUND, MVT::f64, Legal); in ARMTargetLowering()
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