| /external/webp/src/dsp/ |
| D | mips_macro.h | 42 I0, I1, I2, I3, I4, I5, I6, I7, I8, I9) \ argument
45 "ulw %[" #O2 "], " #I3 "+" XSTR(I9) "*" #I7 "(%[" #I0 "]) \n\t" \
53 I0, I1, I2, I3, I4, I5, I6, I7) \ argument
73 "subu %[" #IO3 "], %[" #IO3 "], %[" #I7 "] \n\t"
98 I0, I1, I2, I3, I4, I5, I6, I7) \ argument
105 "addq.ph %[" #O6 "], %[" #I3 "], %[" #I7 "] \n\t" \
106 "subq.ph %[" #O7 "], %[" #I3 "], %[" #I7 "] \n\t" \
161 I0, I1, I2, I3, I4, I5, I6, I7, \ argument
170 "addq.ph %[" #IO7 "], %[" #IO7 "], %[" #I7 "] \n\t" \
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| D | enc_mips_dsp_r2.c | 29 I0, I1, I2, I3, I4, I5, I6, I7) \ argument
36 "addq.ph %[" #O6 "], %[" #I6 "], %[" #I7 "] \n\t" \
37 "subq.ph %[" #O7 "], %[" #I6 "], %[" #I7 "] \n\t"
56 #define MUL_HALF(O0, I0, I1, I2, I3, I4, I5, I6, I7, \ argument
63 "dpa.w.ph $ac0, %[" #I12 "], %[" #I7 "] \n\t" \
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcFrameLowering.cpp | 171 unsigned regInRA = RegInfo.getDwarfRegNum(SP::I7, true); in emitPrologue()
291 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) in verifyLeafProcRegUse()
317 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { in remapRegsForLeafProc()
344 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) { in remapRegsForLeafProc()
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| D | DelaySlotFiller.cpp | 370 if (reg < SP::I0 || reg > SP::I7) in combineRestoreADD()
398 if (reg < SP::I0 || reg > SP::I7) in combineRestoreOR()
436 if (reg < SP::I0 || reg > SP::I7) in combineRestoreSETHIi()
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| D | SparcRegisterInfo.td | 153 def I7 : Ri<31, "I7">, DwarfRegNum<[31]>;
260 def I6_I7 : Rdi<30, "I6", [I6, I7]>;
|
| D | SparcRegisterInfo.cpp | 73 Reserved.set(SP::I7); in getReservedRegs()
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| D | SparcCallingConv.td | 143 let OtherPreserved = (add I6, I7);
|
| /external/llvm/test/CodeGen/Mips/ |
| D | cmov.ll | 275 ; 32-CMOV-DAG: addiu $[[I7:[0-9]+]], $zero, 7
279 ; 32-CMOV-DAG: movn $[[I5]], $[[I7]], $[[R0]]
281 ; 32-CMP-DAG: addiu $[[I7:[0-9]+]], $zero, 7
286 ; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I7]], $[[R0]]
290 ; 64-CMOV-DAG: addiu $[[I7:[0-9]+]], $zero, 7
294 ; 64-CMOV-DAG: movn $[[I5]], $[[I7]], $[[R0]]
296 ; 64-CMP-DAG: addiu $[[I7:[0-9]+]], $zero, 7
301 ; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I7]], $[[R0]]
579 ; 32-CMOV-DAG: addiu $[[I7:[0-9]+]], $zero, 7
583 ; 32-CMOV-DAG: movn $[[I5]], $[[I7]], $[[R0]]
[all …]
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| /external/clang/test/CodeGenObjC/ |
| D | interface-layout-64.m | 85 @interface I7 { interface
89 @interface I8 : I7 {
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| /external/clang/test/ASTMerge/Inputs/ |
| D | interface2.m | 37 @interface I7 interface
|
| D | interface1.m | 38 @interface I7 interface
|
| /external/llvm/lib/Target/Sparc/InstPrinter/ |
| D | SparcInstPrinter.cpp | 71 case SP::I7: O << "\tret"; return true; in printSparcAliasInstr()
|
| /external/ImageMagick/PerlMagick/t/reference/write/filter/ |
| D | Equalize.miff | 92 …}������ڭ��Lgb2�I{�͑��������������U��>ī P)W @b&_r-�}1��4��7�r3�u7��2x}/Y%,I7'@P'@b&7W'Ih(g}3}r9x7…
117 �Q�I7�_h�Yu�Qy�@r呥ٯĵ���Qu�I\�@h�0y�@��0��7��ru�Y%�Y
118 …��=��D��K��M��f��q��j��F��>��F��R��g��^���������Q.�%%�7I�7?�0�I�Q.�_%�)�I7�_h�����}�m}�_��0y�Yy…
119 …�a��^��\��\��\��Y��K��6�r(�h(�y,��<���������Q.�7�@�Q�Q�I�YI�0��I��@�Yn�x��m��0W�Qn�I7�m�}%�_
|
| D | Minify.miff | 43 …VjeXjgZ}�{�����������������������������������ʺ��t_I[I3UK6PP7LR4VX<PP;?B49?48?67>65<41811:08H3<M6:I7
|
| D | Colorize.miff | 43 …���� �! �! � � � � � ��(&�-+�% �) �0$�=,�30�=9�PB�P?�K;�O<�I7�4&� �����…
|
| /external/google-breakpad/src/common/ |
| D | test_assembler_unittest.cc | 750 #define I7(a,b,c,d,e,f,g) { a,b,c,d,e,f,g } macro
854 ASSERT_BYTES(contents, I7(0xe6, 0x43, 0xb8, 0xf1, 0xc9, 0x45, 0x14)); in TEST_F()
902 ASSERT_BYTES(contents, I7(0xf5, 0x0a, 0x72, 0x4f, 0x0b, 0x0d, 0x20)); in TEST_F()
964 ASSERT_BYTES(contents, I7(0xe6, 0x43, 0xb8, 0xf1, 0xc9, 0x45, 0x14)); in TEST_F()
1028 ASSERT_BYTES(contents, I7(0xf5, 0x0a, 0x72, 0x4f, 0x0b, 0x0d, 0x20)); in TEST_F()
|
| /external/zlib/src/contrib/masmx64/ |
| D | gvmat64.asm | 7 ; and Intel EM64T on Pentium 4 with EM64T, Pentium D, Core 2 Duo, Core I5/I7)
|
| /external/ImageMagick/PerlMagick/t/reference/filter/ |
| D | Level.miff | 107 ���� � (� (� >�N�&l�({�+v�7l�P�x��I7������������������������������ �������
|
| D | Sharpen.miff | 18 …>*�B3�A9�90�.(�60�90�/$�/�;�F2�;H�,<�03�4:�37�4%�?*�`]�JZ�:0�1!�8%�E-�7 �I7�PG�gj�u��Fp�V{��[m�…
|
| D | Convolve.miff | 15 …������������������������������������������շ���s�fT�WEwK>qE9jA5h@4gA4cB6_D5[I7\S>JI2BF,MO2ffIY\D=C2…
|
| /external/ImageMagick/PerlMagick/t/reference/composite/ |
| D | Difference.miff | 51 Q9GG9QR9Kb>IX9IW>Lb:GT<LQ:GT:EV:DZ5?T:FbCM�E=�I7�J6�P:�N;|?7f:>k9@w?@}@<n>Ea=Ke<Nf>Pc;N`9Oc7@� �=…
|
| /external/ImageMagick/Magick++/tests/ |
| D | test_image.miff | 388 *!</(G5.I7.UC9ZH?UC9VA7[C9\E<ZF9`J=dLAgPCgOAdN@aL>`K<_K9^H9hQGeREeRF`MEUC5kS oUeV
1245 …������������ sqpm{�}yw��~:+ ������I7(��{���g[ ���
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 109 Sparc::I4, Sparc::I5, Sparc::I6, Sparc::I7 };
358 else if (Reg >= Sparc::I0 && Reg <= Sparc::I7) in MorphToIntPairReg()
|
| /external/ImageMagick/PerlMagick/t/reference/jpeg/ |
| D | write_plane_interlaced.miff | 16 …+.,*-+),+),,*--+./-00.13/,2.-1-,4/,91/<41>50>5.@85E82N8-\6)s5&�:-�B5�G>�H:�I7�F/�?'�<(�=-�@/�?.�8.…
|
| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 75 SP::I4, SP::I5, SP::I6, SP::I7 };
|