| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_program.c | 177 struct prog_instruction *inst = prog->Instructions + i; in brwProgramStringNotify()
180 if (prog->Instructions[i].Opcode == OPCODE_CAL) { in brwProgramStringNotify()
188 if (prog->Instructions[i].Opcode == OPCODE_RET) { in brwProgramStringNotify()
196 if (prog->Instructions[i].SrcReg[r].RelAddr && in brwProgramStringNotify()
197 prog->Instructions[i].SrcReg[r].File == PROGRAM_INPUT) { in brwProgramStringNotify()
205 prog->Instructions[i].DstReg.RelAddr && in brwProgramStringNotify()
206 prog->Instructions[i].DstReg.File == PROGRAM_OUTPUT) { in brwProgramStringNotify()
212 if ((prog->Instructions[i].DstReg.RelAddr && in brwProgramStringNotify()
213 prog->Instructions[i].DstReg.File == PROGRAM_TEMPORARY) || in brwProgramStringNotify()
214 (prog->Instructions[i].SrcReg[0].RelAddr && in brwProgramStringNotify()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 178 SmallVectorImpl<MCInst> &Instructions);
181 SmallVectorImpl<MCInst> &Instructions);
185 SmallVectorImpl<MCInst> &Instructions);
189 SmallVectorImpl<MCInst> &Instructions);
192 SmallVectorImpl<MCInst> &Instructions);
196 SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions);
199 SmallVectorImpl<MCInst> &Instructions);
202 SmallVectorImpl<MCInst> &Instructions, bool isLoad,
206 SmallVectorImpl<MCInst> &Instructions);
209 SmallVectorImpl<MCInst> &Instructions);
[all …]
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| /external/llvm/lib/MC/ |
| D | MCStreamer.cpp | 74 (MAB ? MAB->generateCompactUnwindEncoding(FI.Instructions) : 0); in generateCompactUnwindEncodings()
264 CurFrame->Instructions.push_back(Instruction); in EmitCFIDefCfa()
273 CurFrame->Instructions.push_back(Instruction); in EmitCFIDefCfaOffset()
281 CurFrame->Instructions.push_back(Instruction); in EmitCFIAdjustCfaOffset()
289 CurFrame->Instructions.push_back(Instruction); in EmitCFIDefCfaRegister()
298 CurFrame->Instructions.push_back(Instruction); in EmitCFIOffset()
306 CurFrame->Instructions.push_back(Instruction); in EmitCFIRelOffset()
328 CurFrame->Instructions.push_back(Instruction); in EmitCFIRememberState()
336 CurFrame->Instructions.push_back(Instruction); in EmitCFIRestoreState()
344 CurFrame->Instructions.push_back(Instruction); in EmitCFISameValue()
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| D | MCWin64EH.cpp | 179 uint8_t numCodes = CountOfUnwindCodes(info->Instructions); in EmitUnwindInfo()
184 WinEH::Instruction &frameInst = info->Instructions[info->LastFrameInst]; in EmitUnwindInfo()
191 uint8_t numInst = info->Instructions.size(); in EmitUnwindInfo()
193 WinEH::Instruction inst = info->Instructions.back(); in EmitUnwindInfo()
194 info->Instructions.pop_back(); in EmitUnwindInfo()
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_compiler.c | 40 c->Program.Instructions.Prev = &c->Program.Instructions; in rc_init()
41 c->Program.Instructions.Next = &c->Program.Instructions; in rc_init()
42 c->Program.Instructions.U.I.Opcode = RC_OPCODE_ILLEGAL_OPCODE; in rc_init()
117 for(inst = c->Program.Instructions.Next; inst != &c->Program.Instructions; inst = inst->Next) in rc_calculate_inputs_outputs()
144 for(inst = c->Program.Instructions.Next; inst != &c->Program.Instructions; inst = inst->Next) { in rc_move_input()
176 for(inst = c->Program.Instructions.Next; inst != &c->Program.Instructions; inst = inst->Next) { in rc_move_output()
199 for(inst = c->Program.Instructions.Next; inst != &c->Program.Instructions; inst = inst->Next) { in rc_copy_output()
210 inst = rc_insert_new_instruction(c, c->Program.Instructions.Prev); in rc_copy_output()
219 inst = rc_insert_new_instruction(c, c->Program.Instructions.Prev); in rc_copy_output()
248 inst_rcp = rc_insert_new_instruction(c, &c->Program.Instructions); in rc_transform_fragment_wpos()
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| D | radeon_program.c | 57 struct rc_instruction * inst = c->Program.Instructions.Next; in rc_local_transform()
59 while(inst != &c->Program.Instructions) { in rc_local_transform()
114 for(inst = c->Program.Instructions.Next; in rc_get_used_temporaries()
115 inst != &c->Program.Instructions; inst = inst->Next) { in rc_get_used_temporaries()
216 for(inst = c->Program.Instructions.Next; in rc_recompute_ips()
217 inst != &c->Program.Instructions; in rc_recompute_ips()
222 c->Program.Instructions.IP = 0xcafedead; in rc_recompute_ips()
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| D | radeon_dataflow_deadcode.c | 61 struct instruction_state * Instructions; member
155 struct instruction_state * insts = &s->Instructions[inst->IP]; in update_instruction()
225 s.Instructions = memory_pool_malloc(&c->Pool, sizeof(struct instruction_state)*nr_instructions); in rc_dataflow_deadcode()
226 memset(s.Instructions, 0, sizeof(struct instruction_state)*nr_instructions); in rc_dataflow_deadcode()
230 for(struct rc_instruction * inst = c->Program.Instructions.Prev; in rc_dataflow_deadcode()
231 inst != &c->Program.Instructions; in rc_dataflow_deadcode()
313 for(struct rc_instruction * inst = c->Program.Instructions.Next; in rc_dataflow_deadcode()
314 inst != &c->Program.Instructions; in rc_dataflow_deadcode()
324 inst->U.I.DstReg.WriteMask = s.Instructions[ip].WriteMask; in rc_dataflow_deadcode()
325 if (s.Instructions[ip].WriteMask) in rc_dataflow_deadcode()
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| D | radeon_remove_constants.c | 85 for (struct rc_instruction *inst = c->Program.Instructions.Next; in rc_remove_unused_constants()
86 inst != &c->Program.Instructions; inst = inst->Next) { in rc_remove_unused_constants()
127 for (struct rc_instruction *inst = c->Program.Instructions.Next; in rc_remove_unused_constants()
128 inst != &c->Program.Instructions; inst = inst->Next) { in rc_remove_unused_constants()
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| D | radeon_emulate_loops.c | 219 for(inst = c->Program.Instructions.Next; inst != loop->BeginLoop; in try_unroll_loop()
342 if (ptr == &c->Program.Instructions) { in build_loop_info()
353 for(ptr = ptr->Next; ptr != &c->Program.Instructions; in build_loop_info()
363 if (ptr == &c->Program.Instructions) { in build_loop_info()
479 for(ptr = s->C->Program.Instructions.Next; in rc_transform_loops()
480 ptr != &s->C->Program.Instructions; ptr = ptr->Next) { in rc_transform_loops()
494 for(inst = c->Program.Instructions.Next; in rc_unroll_loops()
495 inst != &c->Program.Instructions; inst = inst->Next) { in rc_unroll_loops()
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| D | radeon_rename_regs.c | 56 for(inst = c->Program.Instructions.Next; in rc_rename_regs()
57 inst != &c->Program.Instructions; in rc_rename_regs()
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| /external/mesa3d/src/mesa/program/ |
| D | programopt.c | 103 _mesa_copy_instructions (newInst + 4, vprog->Base.Instructions, origLen); in _mesa_insert_mvp_dp4_code()
106 _mesa_free_instructions(vprog->Base.Instructions, origLen); in _mesa_insert_mvp_dp4_code()
109 vprog->Base.Instructions = newInst; in _mesa_insert_mvp_dp4_code()
205 _mesa_copy_instructions (newInst + 4, vprog->Base.Instructions, origLen); in _mesa_insert_mvp_mad_code()
208 _mesa_free_instructions(vprog->Base.Instructions, origLen); in _mesa_insert_mvp_mad_code()
211 vprog->Base.Instructions = newInst; in _mesa_insert_mvp_mad_code()
284 _mesa_copy_instructions(newInst, fprog->Base.Instructions, origLen); in _mesa_append_fog_code()
409 _mesa_free_instructions(fprog->Base.Instructions, origLen); in _mesa_append_fog_code()
412 fprog->Base.Instructions = newInst; in _mesa_append_fog_code()
453 const struct prog_instruction *inst = prog->Instructions + i; in _mesa_count_texture_indirections()
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| D | arbprogparse.c | 125 if (program->Base.Instructions) in _mesa_parse_arb_fragment_program()
126 free(program->Base.Instructions); in _mesa_parse_arb_fragment_program()
127 program->Base.Instructions = prog.Instructions; in _mesa_parse_arb_fragment_program()
205 if (program->Base.Instructions) in _mesa_parse_arb_vertex_program()
206 free(program->Base.Instructions); in _mesa_parse_arb_vertex_program()
207 program->Base.Instructions = prog.Instructions; in _mesa_parse_arb_vertex_program()
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| D | program.c | 388 if (prog->Instructions) { in _mesa_delete_program()
389 _mesa_free_instructions(prog->Instructions, prog->NumInstructions); in _mesa_delete_program()
500 clone->Instructions = _mesa_alloc_instructions(prog->NumInstructions); in _mesa_clone_program()
501 if (!clone->Instructions) { in _mesa_clone_program()
505 _mesa_copy_instructions(clone->Instructions, prog->Instructions, in _mesa_clone_program()
585 struct prog_instruction *inst = prog->Instructions + i; in _mesa_insert_instructions()
600 _mesa_copy_instructions(newInst, prog->Instructions, start); in _mesa_insert_instructions()
607 prog->Instructions + start, in _mesa_insert_instructions()
611 _mesa_free_instructions(prog->Instructions, origLen); in _mesa_insert_instructions()
614 prog->Instructions = newInst; in _mesa_insert_instructions()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenTarget.h | 69 std::unique_ptr<CodeGenInstruction>> Instructions; variable
152 if (Instructions.empty()) ReadInstructions(); in getInstructions()
153 return Instructions; in getInstructions()
158 if (Instructions.empty()) ReadInstructions(); in getInstruction()
159 auto I = Instructions.find(InstRec); in getInstruction()
160 assert(I != Instructions.end() && "Not an instruction"); in getInstruction()
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| D | AsmWriterEmitter.cpp | 41 std::vector<AsmWriterInst> Instructions; member in __anon09d52c160111::AsmWriterEmitter
487 for (unsigned i = 0, e = Instructions.size(); i != e; ++i) { in EmitPrintInstruction()
489 AsmWriterInst &Inst = Instructions[i]; in EmitPrintInstruction()
491 Instructions.erase(Instructions.begin()+i); in EmitPrintInstruction()
499 std::reverse(Instructions.begin(), Instructions.end()); in EmitPrintInstruction()
506 if (!Instructions.empty()) { in EmitPrintInstruction()
509 while (!Instructions.empty()) in EmitPrintInstruction()
510 EmitInstructions(Instructions, O); in EmitPrintInstruction()
1103 Instructions.emplace_back(*I, AsmWriter->getValueAsInt("Variant"), in AsmWriterEmitter()
1112 for (unsigned i = 0, e = Instructions.size(); i != e; ++i) in AsmWriterEmitter()
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-undefined.txt | 6 # Instructions notionally in the add/sub (extended register) sheet, but with
15 # Instructions notionally in the add/sub (immediate) sheet, but with
26 # Instructions notionally in the load/store (unsigned immediate) sheet.
33 # Instructions notionally in the floating-point <-> fixed-point conversion
40 # Instructions notionally in the logical (shifted register) sheet, but with out
45 # Instructions notionally in the move wide (immediate) sheet, but with out
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AddressTypePromotion.cpp | 104 typedef SmallVector<Instruction *, 16> Instructions; typedef in __anon996cc3d90111::AArch64AddressTypePromotion
105 typedef DenseMap<Value *, Instructions> ValueToInsts;
123 bool propagateSignExtension(Instructions &SExtInsts);
137 void analyzeSExtension(Instructions &SExtInsts);
254 AArch64AddressTypePromotion::propagateSignExtension(Instructions &SExtInsts) { in propagateSignExtension()
384 Instructions &Insts = Entry.second; in mergeSExts()
385 Instructions CurPts; in mergeSExts()
418 void AArch64AddressTypePromotion::analyzeSExtension(Instructions &SExtInsts) { in analyzeSExtension()
491 Instructions SExtInsts; in runOnFunction()
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| /external/llvm/include/llvm/MC/ |
| D | MCWinEH.h | 46 std::vector<Instruction> Instructions; member
52 ChainedParent(nullptr), Instructions() {} in FrameInfo()
57 ChainedParent(nullptr), Instructions() {} in FrameInfo()
63 ChainedParent(ChainedParent), Instructions() {} in FrameInfo()
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| /external/llvm/docs/ |
| D | AMDGPUUsage.rst | 23 DS Instructions
27 FLAT Instructions
32 MUBUF Instructions
36 SMRD Instructions
40 SOP1 Instructions
44 SOP2 Instructions
48 SOPC Instructions
52 SOPP Instructions
78 VOP1, VOP2, VOP3, VOPC Instructions
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_cb_bitmap.c | 132 p->Instructions = _mesa_alloc_instructions(p->NumInstructions); in make_bitmap_fragment_program()
133 if (!p->Instructions) { in make_bitmap_fragment_program()
137 _mesa_init_instructions(p->Instructions, p->NumInstructions); in make_bitmap_fragment_program()
140 p->Instructions[ic].Opcode = OPCODE_TEX; in make_bitmap_fragment_program()
141 p->Instructions[ic].DstReg.File = PROGRAM_TEMPORARY; in make_bitmap_fragment_program()
142 p->Instructions[ic].DstReg.Index = 0; in make_bitmap_fragment_program()
143 p->Instructions[ic].SrcReg[0].File = PROGRAM_INPUT; in make_bitmap_fragment_program()
144 p->Instructions[ic].SrcReg[0].Index = FRAG_ATTRIB_TEX0; in make_bitmap_fragment_program()
145 p->Instructions[ic].TexSrcUnit = samplerIndex; in make_bitmap_fragment_program()
146 p->Instructions[ic].TexSrcTarget = TEXTURE_2D_INDEX; in make_bitmap_fragment_program()
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| D | st_cb_drawpixels.c | 85 const struct prog_instruction *inst = prog->Base.Instructions; in is_passthrough_program()
224 p->Instructions = _mesa_alloc_instructions(p->NumInstructions); in st_make_drawpix_z_stencil_program()
225 if (!p->Instructions) { in st_make_drawpix_z_stencil_program()
229 _mesa_init_instructions(p->Instructions, p->NumInstructions); in st_make_drawpix_z_stencil_program()
233 p->Instructions[ic].Opcode = OPCODE_TEX; in st_make_drawpix_z_stencil_program()
234 p->Instructions[ic].DstReg.File = PROGRAM_OUTPUT; in st_make_drawpix_z_stencil_program()
235 p->Instructions[ic].DstReg.Index = FRAG_RESULT_DEPTH; in st_make_drawpix_z_stencil_program()
236 p->Instructions[ic].DstReg.WriteMask = WRITEMASK_Z; in st_make_drawpix_z_stencil_program()
237 p->Instructions[ic].SrcReg[0].File = PROGRAM_INPUT; in st_make_drawpix_z_stencil_program()
238 p->Instructions[ic].SrcReg[0].Index = FRAG_ATTRIB_TEX0; in st_make_drawpix_z_stencil_program()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | LoopRerollPass.cpp | 178 : Valid(false), Instructions(1, P) { in SimpleLoopReduction()
189 return Instructions.front(); in getPHI()
194 return Instructions.back(); in getReducedValue()
199 return Instructions[i+1]; in get()
207 return Instructions.size()-1; in size()
215 return std::next(Instructions.begin()); in begin()
220 return std::next(Instructions.begin()); in begin()
223 iterator end() { return Instructions.end(); } in end()
224 const_iterator end() const { return Instructions.end(); } in end()
228 SmallInstructionVector Instructions; member
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| /external/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.cpp | 75 std::vector<Instruction> Instructions; member in llvm::FrameEntry
80 Instructions.push_back(Instruction(Opcode)); in addInstruction()
84 Instructions.push_back(Instruction(Opcode)); in addInstruction()
85 Instructions.back().Ops.push_back(Operand1); in addInstruction()
89 Instructions.push_back(Instruction(Opcode)); in addInstruction()
90 Instructions.back().Ops.push_back(Operand1); in addInstruction()
91 Instructions.back().Ops.push_back(Operand2); in addInstruction()
414 for (const auto &Instr : Instructions) { in dumpInstructions()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | CIInstructions.td | 37 // VOP1 Instructions
67 // VOP3 Instructions
93 // DS Instructions
101 // SMRD Instructions
108 // MUBUF Instructions
116 // Flat Instructions
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| /external/llvm/test/tools/llvm-objdump/ |
| D | eh_frame-arm64.test | 14 # CHECK: Instructions:
22 # CHECK: Instructions:
|