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Searched refs:Irrm_ZERO (Results 1 – 10 of 10) sorted by relevance

/external/valgrind/VEX/priv/
Dguest_s390_helpers.c955 case Irrm_ZERO: return S390_BFP_ROUND_ZERO; in decode_bfp_rounding_mode()
1202 case Irrm_ZERO: in decode_dfp_rounding_mode()
Dguest_ppc_toIR.c9092 binop(Iop_F64toI32S, mkU32(Irrm_ZERO), mkexpr(frB) )); in dis_fp_round()
9104 opc2 == 0x08F ? mkU32( Irrm_ZERO ) : rm, in dis_fp_round()
9125 binop(Iop_F64toI64S, mkU32(Irrm_ZERO), mkexpr(frB)) ); in dis_fp_round()
9136 binop(Iop_F64toI64U, opc2 == 0x3AE ? rm : mkU32(Irrm_ZERO), mkexpr(frB)) ); in dis_fp_round()
9165 binop(Iop_F64toI64S, mkU32(Irrm_ZERO), mkexpr(frB)) ); in dis_fp_round()
12740 mkU32( Irrm_ZERO ), in dis_vx_conv()
12750 mkU32( Irrm_ZERO ), in dis_vx_conv()
12760 mkU32( Irrm_ZERO ), in dis_vx_conv()
12817 IRExpr* rmZero = mkU32(Irrm_ZERO); in dis_vx_conv()
12915 mkU32( Irrm_ZERO ), in dis_vx_conv()
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Dguest_arm64_toIR.c9448 assign(rm, mkU32(Irrm_ZERO)); in dis_AdvSIMD_scalar_shift_by_imm()
10080 case 5: ch = 'z'; irrm = Irrm_ZERO; break; in dis_AdvSIMD_scalar_two_reg_misc()
10816 assign(rm, mkU32(Irrm_ZERO)); in dis_AdvSIMD_shift_by_immediate()
12311 case 4: ch = 'z'; assign(irrm, mkU32(Irrm_ZERO)); break; in dis_AdvSIMD_two_reg_misc()
12370 case 5: ch = 'z'; irrm = Irrm_ZERO; break; in dis_AdvSIMD_two_reg_misc()
13147 case BITS3(0,1,1): ch = 'z'; irrmE = mkU32(Irrm_ZERO); break; in dis_AdvSIMD_fp_data_proc_1_source()
13427 assign(irrm, mkU32(Irrm_ZERO)); in dis_AdvSIMD_fp_to_from_fixedp_conv()
13549 case BITS2(1,1): ch = 'z'; irrm = Irrm_ZERO; break; in dis_AdvSIMD_fp_to_from_int_conv()
13579 (iop == Iop_F32toI32S && irrm == Irrm_ZERO) /* FCVTZS Wd,Sn */ in dis_AdvSIMD_fp_to_from_int_conv()
13584 || (iop == Iop_F32toI32U && irrm == Irrm_ZERO) /* FCVTZU Wd,Sn */ in dis_AdvSIMD_fp_to_from_int_conv()
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Dguest_x86_toIR.c4716 binop(Iop_F64toI32S, mkU32(Irrm_ZERO), get_ST(0)) ); in dis_FPU()
5021 binop(Iop_F64toI64S, mkU32(Irrm_ZERO), get_ST(0)) ); in dis_FPU()
5392 binop(Iop_F64toI16S, mkU32(Irrm_ZERO), get_ST(0)) ); in dis_FPU()
8667 assign(rmode, mkU32((UInt)Irrm_ZERO) ); in disInstr_X86_WRK()
8716 assign( rmode, mkU32((UInt)Irrm_ZERO) ); in disInstr_X86_WRK()
9770 assign(rmode, mkU32((UInt)Irrm_ZERO) ); in disInstr_X86_WRK()
9971 assign( rmode, mkU32((UInt)Irrm_ZERO) ); in disInstr_X86_WRK()
10085 assign( rmode, mkU32((UInt)Irrm_ZERO) ); in disInstr_X86_WRK()
10129 assign( rmode, mkU32((UInt)Irrm_ZERO) ); in disInstr_X86_WRK()
Dhost_s390_isel.c704 case Irrm_ZERO: return S390_BFP_ROUND_ZERO; in get_bfp_rounding_mode()
819 case Irrm_ZERO: in get_dfp_rounding_mode()
Dguest_amd64_toIR.c6227 binop(Iop_F64toI32S, mkU32(Irrm_ZERO), get_ST(0)) ); in dis_FPU()
6515 binop(Iop_F64toI64S, mkU32(Irrm_ZERO), get_ST(0)) ); in dis_FPU()
6903 binop(Iop_F64toI32S, mkU32(Irrm_ZERO), get_ST(0)) )); in dis_FPU()
10349 assign( rmode, mkU32((UInt)Irrm_ZERO) ); in dis_CVTxSD2SI()
10397 assign( rmode, mkU32((UInt)Irrm_ZERO) ); in dis_CVTxSS2SI()
10566 assign( rmode, r2zero ? mkU32((UInt)Irrm_ZERO) in dis_CVTxPS2DQ_128()
10616 assign( rmode, r2zero ? mkU32((UInt)Irrm_ZERO) in dis_CVTxPS2DQ_256()
10669 assign(rmode, mkU32((UInt)Irrm_ZERO) ); in dis_CVTxPD2DQ_128()
10724 assign(rmode, mkU32((UInt)Irrm_ZERO) ); in dis_CVTxPD2DQ_256()
13076 assign(rmode, mkU32((UInt)Irrm_ZERO) ); in dis_ESC_0F__SSE2()
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Dhost_arm64_isel.c1675 case Irrm_ZERO: armrm = 3; break; in iselIntExpr_R_wrk()
Dguest_arm_toIR.c13730 assign(rmode, bZ ? mkU32(Irrm_ZERO) in decode_CP10_CP11_instruction()
14257 assign(rmode, bZ ? mkU32(Irrm_ZERO) in decode_CP10_CP11_instruction()
14396 assign(rmode, mkU32(Irrm_ZERO)); // as per the spec in decode_CP10_CP11_instruction()
14418 assign(rmode, mkU32(Irrm_ZERO)); // as per the spec in decode_CP10_CP11_instruction()
Dguest_s390_toIR.c1576 case S390_BFP_ROUND_ZERO: rm = mkU32(Irrm_ZERO); break; in encode_bfp_rounding_mode()
1644 rm = mkU32(Irrm_ZERO ); break; in encode_dfp_rounding_mode()
/external/valgrind/VEX/pub/
Dlibvex_ir.h1866 Irrm_ZERO = 3, // Round toward zero enumerator