Searched refs:IsFP (Results 1 – 13 of 13) sorted by relevance
/external/v8/src/compiler/ |
D | register-allocator-verifier.cc | 163 constraint->type_ = sequence()->IsFP(vreg) ? kFPSlot : kSlot; in BuildConstraint() 169 if (sequence()->IsFP(vreg)) { in BuildConstraint() 189 if (sequence()->IsFP(vreg)) { in BuildConstraint() 196 constraint->type_ = sequence()->IsFP(vreg) ? kFPSlot : kSlot; in BuildConstraint()
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D | instruction.h | 1338 bool IsFP(int virtual_register) const { in IsFP() function
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.h | 101 bool IsFP) const;
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D | MipsSEISelLowering.cpp | 3209 bool IsFP) const { in emitINSERT_DF_VIDX() 3253 if (IsFP) { in emitINSERT_DF_VIDX() 3279 if (IsFP) { in emitINSERT_DF_VIDX()
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 825 NodeType getExtForLoadExtType(bool IsFP, LoadExtType);
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/external/llvm/lib/Bitcode/Reader/ |
D | BitcodeReader.cpp | 738 bool IsFP = Ty->isFPOrFPVectorTy(); in getDecodedBinaryOpcode() local 740 if (!IsFP && !Ty->isIntOrIntVectorTy()) in getDecodedBinaryOpcode() 747 return IsFP ? Instruction::FAdd : Instruction::Add; in getDecodedBinaryOpcode() 749 return IsFP ? Instruction::FSub : Instruction::Sub; in getDecodedBinaryOpcode() 751 return IsFP ? Instruction::FMul : Instruction::Mul; in getDecodedBinaryOpcode() 753 return IsFP ? -1 : Instruction::UDiv; in getDecodedBinaryOpcode() 755 return IsFP ? Instruction::FDiv : Instruction::SDiv; in getDecodedBinaryOpcode() 757 return IsFP ? -1 : Instruction::URem; in getDecodedBinaryOpcode() 759 return IsFP ? Instruction::FRem : Instruction::SRem; in getDecodedBinaryOpcode() 761 return IsFP ? -1 : Instruction::Shl; in getDecodedBinaryOpcode() [all …]
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/external/v8/test/unittests/compiler/ |
D | instruction-selector-unittest.cc | 96 if (sequence.IsFP(virtual_register)) { in Build() 101 EXPECT_FALSE(sequence.IsFP(virtual_register)); in Build()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 2179 static unsigned getVectorComparison(ISD::CondCode CC, bool IsFP) { in getVectorComparison() argument 2183 return IsFP ? SystemZISD::VFCMPE : SystemZISD::VICMPE; in getVectorComparison() 2187 return IsFP ? SystemZISD::VFCMPHE : static_cast<SystemZISD::NodeType>(0); in getVectorComparison() 2191 return IsFP ? SystemZISD::VFCMPH : SystemZISD::VICMPH; in getVectorComparison() 2194 return IsFP ? static_cast<SystemZISD::NodeType>(0) : SystemZISD::VICMPHL; in getVectorComparison() 2205 static unsigned getVectorComparisonOrInvert(ISD::CondCode CC, bool IsFP, in getVectorComparisonOrInvert() argument 2207 if (unsigned Opcode = getVectorComparison(CC, IsFP)) { in getVectorComparisonOrInvert() 2212 CC = ISD::getSetCCInverse(CC, !IsFP); in getVectorComparisonOrInvert() 2213 if (unsigned Opcode = getVectorComparison(CC, IsFP)) { in getVectorComparisonOrInvert() 2253 bool IsFP = CmpOp0.getValueType().isFloatingPoint(); in lowerVectorSETCC() local [all …]
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 1072 bool IsFP = fieldFromInstruction(insn, 26, 1); in DecodeSignedLdStInstruction() local 1075 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) in DecodeSignedLdStInstruction()
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/external/v8/src/compiler/ia32/ |
D | instruction-selector-ia32.cc | 1123 sequence()->IsFP(GetVirtualRegister(input.node())) in EmitPrepareArguments()
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/external/v8/src/compiler/x87/ |
D | instruction-selector-x87.cc | 1138 sequence()->IsFP(GetVirtualRegister(input.node())) in EmitPrepareArguments()
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/external/v8/src/compiler/x64/ |
D | instruction-selector-x64.cc | 1457 sequence()->IsFP(GetVirtualRegister(input.node())) in EmitPrepareArguments()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 230 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) { in getExtForLoadExtType() argument 233 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND; in getExtForLoadExtType()
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