| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmInstrumentation.cpp | 213 bool IsWrite,
217 bool IsWrite,
224 void InstrumentMemOperand(X86Operand &Op, unsigned AccessSize, bool IsWrite,
283 X86Operand &Op, unsigned AccessSize, bool IsWrite, in InstrumentMemOperand() argument
290 InstrumentMemOperandSmall(Op, AccessSize, IsWrite, RegCtx, Ctx, Out); in InstrumentMemOperand()
292 InstrumentMemOperandLarge(Op, AccessSize, IsWrite, RegCtx, Ctx, Out); in InstrumentMemOperand()
415 const bool IsWrite = MII.get(Inst.getOpcode()).mayStore(); in InstrumentMOV() local
428 InstrumentMemOperand(MemOp, AccessSize, IsWrite, RegCtx, Ctx, Out); in InstrumentMOV()
585 bool IsWrite,
590 bool IsWrite,
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| /external/llvm/lib/Transforms/Instrumentation/ |
| D | AddressSanitizer.cpp | 435 Value *isInterestingMemoryAccess(Instruction *I, bool *IsWrite,
441 Value *Addr, uint32_t TypeSize, bool IsWrite,
444 uint32_t TypeSize, bool IsWrite,
450 bool IsWrite, size_t AccessSizeIndex,
876 bool *IsWrite, in isInterestingMemoryAccess() argument
886 *IsWrite = false; in isInterestingMemoryAccess()
892 *IsWrite = true; in isInterestingMemoryAccess()
898 *IsWrite = true; in isInterestingMemoryAccess()
904 *IsWrite = true; in isInterestingMemoryAccess()
961 bool IsWrite = false; in instrumentMop() local
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| D | ThreadSanitizer.cpp | 409 bool IsWrite = isa<StoreInst>(*I); in instrumentLoadOrStore() local
410 Value *Addr = IsWrite in instrumentLoadOrStore()
416 if (IsWrite && isVtableAccess(I)) { in instrumentLoadOrStore()
434 if (!IsWrite && isVtableAccess(I)) { in instrumentLoadOrStore()
440 const unsigned Alignment = IsWrite in instrumentLoadOrStore()
447 OnAccessFunc = IsWrite ? TsanWrite[Idx] : TsanRead[Idx]; in instrumentLoadOrStore()
449 OnAccessFunc = IsWrite ? TsanUnalignedWrite[Idx] : TsanUnalignedRead[Idx]; in instrumentLoadOrStore()
451 if (IsWrite) NumInstrumentedWrites++; in instrumentLoadOrStore()
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| /external/compiler-rt/lib/tsan/rtl/ |
| D | tsan_rtl.h | 200 DCHECK_EQ(kAccessIsWrite, IsWrite()); in SetWrite()
250 bool ALWAYS_INLINE IsWrite() const { return !IsRead(); } in IsWrite() function
279 DCHECK_EQ(v, (!IsWrite() && !kIsWrite) || (IsAtomic() && kIsAtomic)); in IsBothReadsOrAtomic()
287 (IsAtomic() == kIsAtomic && !IsWrite() <= !kIsWrite)); in IsRWNotWeaker()
295 (IsAtomic() == kIsAtomic && !IsWrite() >= !kIsWrite)); in IsRWWeakerOrEqual()
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| D | tsan_rtl_report.cc | 166 mop->write = s.IsWrite(); in AddMemoryAccess()
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| /external/llvm/lib/Analysis/ |
| D | LoopAccessAnalysis.cpp | 561 bool IsWrite = Accesses.count(MemAccessInfo(Ptr, true)); in canCheckPtrAtRT() local
562 MemAccessInfo Access(Ptr, IsWrite); in canCheckPtrAtRT()
564 if (IsWrite) in canCheckPtrAtRT()
587 RtCheck.insert(TheLoop, Ptr, IsWrite, DepId, ASId, StridesMap, PSE); in canCheckPtrAtRT()
702 bool IsWrite = AC.getInt(); in processMemAccesses() local
706 bool IsReadOnlyPtr = ReadOnlyPtr.count(Ptr) && !IsWrite; in processMemAccesses()
711 assert(((IsReadOnlyPtr && UseDeferred) || IsWrite || in processMemAccesses()
715 MemAccessInfo Access(Ptr, IsWrite); in processMemAccesses()
732 if ((IsWrite || IsReadOnlyPtr) && SetHasWrite) { in processMemAccesses()
737 if (IsWrite) in processMemAccesses()
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| /external/compiler-rt/lib/tsan/tests/unit/ |
| D | tsan_shadow_test.cc | 28 EXPECT_EQ(s.IsWrite(), true); in TEST()
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| /external/pdfium/third_party/lcms2-2.6/src/ |
| D | cmsio0.c | 1020 NewIcc -> IsWrite = TRUE; in cmsOpenProfileFromIOhandler2THR()
1048 NewIcc -> IsWrite = TRUE; in cmsOpenProfileFromFileTHR()
1082 NewIcc -> IsWrite = TRUE; in cmsOpenProfileFromStreamTHR()
1398 if (Icc ->IsWrite) { in cmsCloseProfile()
1400 Icc ->IsWrite = FALSE; // Assure no further writting in cmsCloseProfile()
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| D | lcms2_internal.h | 738 cmsBool IsWrite; member
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 3235 bool IsWrite = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue(); in lowerPREFETCH() local
3236 unsigned Code = IsWrite ? SystemZ::PFD_WRITE : SystemZ::PFD_READ; in lowerPREFETCH()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1793 unsigned IsWrite = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue(); in LowerPREFETCH() local
1809 unsigned PrfOp = (IsWrite << 4) | // Load/Store bit in LowerPREFETCH()
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