Searched refs:IssueWidth (Results 1 – 25 of 31) sorted by relevance
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36 ScheduleHazardRecognizer(), ItinData(II), DAG(SchedDAG), IssueWidth(0), in ScoreboardHazardRecognizer()81 IssueWidth = ItinData->SchedModel.IssueWidth; in ScoreboardHazardRecognizer()112 if (IssueWidth == 0) in atIssueLimit()115 return IssueCount == IssueWidth; in atIssueLimit()
63 ResourceLCM = SchedModel.IssueWidth; in init()69 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth; in init()
98 unsigned IssueWidth; variable
94 unsigned getIssueWidth() const { return SchedModel.IssueWidth; } in getIssueWidth()
139 unsigned IssueWidth; member
162 let IssueWidth = 1; // 1 instruction is dispatched per cycle.
120 let IssueWidth = 4; // 4 (non-branch) instructions are dispatched per cycle.
313 let IssueWidth = 2; // 2 micro-ops are dispatched per cycle.
373 let IssueWidth = 2; // 2 micro-ops are dispatched per cycle.
380 let IssueWidth = 6; // 4 (non-branch) instructions are dispatched per cycle.
390 let IssueWidth = 8; // up to 8 instructions dispatched per cycle.
599 let IssueWidth = 2; // 2 instructions are dispatched per cycle.
163 let IssueWidth = 4;
199 let IssueWidth = 4;
303 let IssueWidth = 4;
18 let IssueWidth = 2;
19 let IssueWidth = 4;
621 // IssueWidth is analogous to the number of decode units. Core and its638 let IssueWidth = 4;
19 let IssueWidth = 2;
90 // global IssueWidth property, which constrains the number of microops
78 int IssueWidth = -1; // Max micro-ops that may be scheduled per cycle.269 // against the processor's IssueWidth limit. If an instruction can
320 if (Packet.size() >= InstrItins->SchedModel.IssueWidth) { in reserveResources()
11 int IssueWidth = 2; // 2x dispatched per cycle
21 let IssueWidth = 2; // 2 micro-ops are dispatched per cycle.
21 // Therefore, IssueWidth is set to the narrower of the two at three, while still25 let IssueWidth = 3; // 3-way decode and dispatch