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Searched refs:Lanes (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonShuffler.h73 unsigned Lanes; variable
79 void setLanes(unsigned l) { Lanes = l; }; in setLanes()
87 unsigned getLanes() const { return (Lanes); }; in getLanes()
/external/llvm/include/llvm/IR/
DIntrinsicsAArch64.td163 // Vector Add Across Lanes
168 // Vector Long Add Across Lanes
259 // Vector Max Across Lanes
275 // Vector Min Across Lanes
/external/llvm/lib/CodeGen/
DRegisterCoalescer.cpp1921 LaneBitmask Lanes = SubRangeJoin ? 1 : TRI->getSubRegIndexLaneMask(SubIdx); in analyzeValue() local
1922 V.ValidLanes = V.WriteLanes = Lanes; in analyzeValue()
2223 LaneBitmask Lanes) const { in usesLanes()
2231 if (Lanes & TRI->getSubRegIndexLaneMask( in usesLanes()
/external/valgrind/
DREADME.aarch64236 math_MINMAXV: use real Iop_Cat{Odd,Even}Lanes ops rather than
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp10301 SmallVector<int, 4> Lanes; in lowerVectorShuffleByMerging128BitLanes() local
10302 Lanes.resize(NumLanes, -1); in lowerVectorShuffleByMerging128BitLanes()
10311 if (Lanes[j] < 0) { in lowerVectorShuffleByMerging128BitLanes()
10313 Lanes[j] = Mask[i] / LaneSize; in lowerVectorShuffleByMerging128BitLanes()
10314 } else if (Lanes[j] != Mask[i] / LaneSize) { in lowerVectorShuffleByMerging128BitLanes()
10335 if (Lanes[i] >= 0) { in lowerVectorShuffleByMerging128BitLanes()
10336 LaneMask[2 * i + 0] = 2*Lanes[i] + 0; in lowerVectorShuffleByMerging128BitLanes()
10337 LaneMask[2 * i + 1] = 2*Lanes[i] + 1; in lowerVectorShuffleByMerging128BitLanes()