/external/mesa3d/src/gallium/drivers/radeon/ |
D | SIInstrInfo.td | 56 let MIOperandInfo = opInfo; 81 let MIOperandInfo = (ops rc:$reg); 86 let MIOperandInfo = (ops rc:$reg); 100 let MIOperandInfo = (ops SReg_64, SReg_32); 105 let MIOperandInfo = (ops SReg_64, i32imm);
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D | R600Instructions.td | 52 let MIOperandInfo = (ops R600_TReg32_X:$ptr, i32imm:$index); 56 let MIOperandInfo = (ops R600_Reg32:$ptr, R600_Reg32:$index);
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/external/llvm/utils/TableGen/ |
D | CodeGenInstruction.h | 102 DagInit *MIOperandInfo; member 113 MIOperandInfo(MIOI) {} in OperandInfo()
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D | CodeGenInstruction.cpp | 187 DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo; in ParseOperandName() 639 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias() 658 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias()
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D | FixedLenDecoderEmitter.cpp | 1863 CGI.Operands[SO.first].MIOperandInfo && in populateInstruction() 1864 CGI.Operands[SO.first].MIOperandInfo->getNumArgs()) { in populateInstruction() 1865 Init *Arg = CGI.Operands[SO.first].MIOperandInfo-> in populateInstruction() 1906 if (CGI.Operands[SO.first].MIOperandInfo && in populateInstruction() 1907 CGI.Operands[SO.first].MIOperandInfo->getNumArgs() > 1 && in populateInstruction()
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D | InstrInfoEmitter.cpp | 100 DagInit *MIOI = Op.MIOperandInfo; in GetOperandInfo()
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D | AsmMatcherEmitter.cpp | 1071 Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef(); in getOperandClass()
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/external/llvm/lib/Target/Mips/ |
D | MicroMipsInstrInfo.td | 65 let MIOperandInfo = (ops GPRMM16, simm4); 91 let MIOperandInfo = (ops GPR32:$base, simm5:$offset); 99 let MIOperandInfo = (ops GPRMM16:$base, simm7:$offset); 106 let MIOperandInfo = (ops GPR32, simm9); 114 let MIOperandInfo = (ops GPR32, simm12); 122 let MIOperandInfo = (ops GPR32, simm16); 138 let MIOperandInfo = (ops GPR32, uimm8); 219 let MIOperandInfo = (ops GPR32Opnd, GPR32Opnd); 240 let MIOperandInfo = (ops GPR32Opnd, GPR32Opnd);
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D | MipsInstrInfo.td | 652 let MIOperandInfo = (ops ptr_rc, simm16); 663 let MIOperandInfo = (ops ptr_rc, simm10); 668 let MIOperandInfo = (ops ptr_rc, simm9); 674 let MIOperandInfo = (ops ptr_rc, simm9); 680 let MIOperandInfo = (ops ptr_rc, simm11); 686 let MIOperandInfo = (ops ptr_rc, simm16); 693 let MIOperandInfo = (ops ptr_rc, simm16); 699 let MIOperandInfo = (ops ptr_rc);
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D | Mips16InstrInfo.td | 24 let MIOperandInfo = (ops CPU16Regs, simm16, CPU16RegsPlusSP); 30 let MIOperandInfo = (ops CPU16RegsPlusSP, simm16);
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZOperands.td | 66 let MIOperandInfo = (ops !cast<Operand>(self)); 92 let MIOperandInfo = operands; 465 let MIOperandInfo = (ops brtarget16:$func, tlssym:$sym); 470 let MIOperandInfo = (ops brtarget32:$func, tlssym:$sym);
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 163 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 179 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 187 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 195 let MIOperandInfo = (ops tGPR:$base, tGPR:$offsreg); 207 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 219 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 231 let MIOperandInfo = (ops tGPR:$base, i32imm:$offsimm); 245 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm);
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D | ARMInstrInfo.td | 539 let MIOperandInfo = (ops GPRnopc, GPRnopc, i32imm); 550 let MIOperandInfo = (ops GPR, i32imm); 561 let MIOperandInfo = (ops GPR, GPR, i32imm); 572 let MIOperandInfo = (ops GPR, i32imm); 816 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 837 let MIOperandInfo = (ops GPR:$base, GPRnopc:$offsreg, i32imm:$shift); 849 let MIOperandInfo = (ops i32imm); 861 let MIOperandInfo = (ops i32imm); 876 let MIOperandInfo = (ops GPRnopc, i32imm); 891 let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm); [all …]
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D | ARMInstrNEON.td | 116 let MIOperandInfo = (ops i32imm); 123 let MIOperandInfo = (ops i32imm); 130 let MIOperandInfo = (ops i32imm); 275 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 285 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 295 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 306 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 316 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 326 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); 336 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx); [all …]
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D | ARMInstrThumb2.td | 52 let MIOperandInfo = (ops rGPR, i32imm); 159 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 188 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 199 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 209 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 234 let MIOperandInfo = (ops GPR:$base, i32imm:$offsimm); 262 let MIOperandInfo = (ops GPRnopc:$base, i32imm:$offsimm); 273 let MIOperandInfo = (ops GPR:$base, rGPR:$offsreg, i32imm:$offsimm); 281 let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm); 287 let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm);
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/external/llvm/lib/Target/X86/ |
D | X86InstrInfo.td | 296 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm); 305 let MIOperandInfo = (ops ptr_rc, i8imm, RC, i32imm, i8imm); 351 let MIOperandInfo = (ops ptr_rc_norex, i8imm, ptr_rc_norex_nosp, i32imm, i8imm); 365 let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, ptr_rc_tailcall, 376 let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, 497 let MIOperandInfo = (ops ptr_rc, i8imm); 502 let MIOperandInfo = (ops ptr_rc); 517 let MIOperandInfo = (ops immOperand, i8imm); 684 let MIOperandInfo = (ops GR64, i8imm, GR64_NOSP, i32imm, i8imm); 691 let MIOperandInfo = (ops GR64, i8imm, GR64_NOSP, i32imm, i8imm);
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D | X86InstrFragmentsSIMD.td | 600 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm); 606 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
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/external/llvm/include/llvm/Target/ |
D | Target.td | 624 dag MIOperandInfo = (ops); 695 /// instruction. OpTypes specifies the MIOperandInfo for the operand, and 700 let MIOperandInfo = OpTypes; 708 let MIOperandInfo = OpTypes;
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/external/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 25 let MIOperandInfo = (ops R600_TReg32_X:$ptr, i32imm:$index); 30 let MIOperandInfo = (ops R600_Reg32:$ptr, R600_Reg32:$index); 71 let MIOperandInfo = (ops R600_Reg32:$ptr, i32imm:$index);
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 54 let MIOperandInfo = (ops i32imm:$imm); 662 let MIOperandInfo = (ops dispRI:$imm, ptr_rc_nor0:$reg); 668 let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg, ptr_rc_idx:$offreg); 672 let MIOperandInfo = (ops dispRIX:$imm, ptr_rc_nor0:$reg); 678 let MIOperandInfo = (ops dispSPE8:$imm, ptr_rc_nor0:$reg); 683 let MIOperandInfo = (ops dispSPE4:$imm, ptr_rc_nor0:$reg); 688 let MIOperandInfo = (ops dispSPE2:$imm, ptr_rc_nor0:$reg); 695 let MIOperandInfo = (ops ptr_rc:$ptrreg); 708 let MIOperandInfo = (ops calltarget:$func, tlsgd32:$sym); 715 let MIOperandInfo = (ops i32imm:$bibo, crrc:$reg);
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D | PPCInstr64Bit.td | 40 let MIOperandInfo = (ops i64imm:$imm); 49 let MIOperandInfo = (ops calltarget:$func, tlsgd:$sym);
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/external/llvm/lib/Target/BPF/ |
D | BPFInstrInfo.td | 64 let MIOperandInfo = (ops GPR, i16imm);
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 588 let MIOperandInfo = (ops regclass, !cast<Operand>("arith_shift" # width)); 610 let MIOperandInfo = (ops regclass, shiftop); 661 let MIOperandInfo = (ops i32imm, i32imm); 668 let MIOperandInfo = (ops i32imm, i32imm); 681 let MIOperandInfo = (ops i32imm, i32imm); 708 let MIOperandInfo = (ops GPR32, arith_extend); 714 let MIOperandInfo = (ops GPR32, arith_extend64); 777 let MIOperandInfo = (ops i64imm); 784 let MIOperandInfo = (ops i64imm); 791 let MIOperandInfo = (ops i64imm); [all …]
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 76 let MIOperandInfo = (ops GR16, i16imm); 81 let MIOperandInfo = (ops GR16, i16imm);
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 98 let MIOperandInfo = (ops ptr_rc, ptr_rc); 103 let MIOperandInfo = (ops ptr_rc, i32imm);
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