Searched refs:OperIdx (Results 1 – 5 of 5) sorted by relevance
/external/llvm/include/llvm/CodeGen/ |
D | ScheduleDAGInstrs.h | 251 void addPhysRegDataDeps(SUnit *SU, unsigned OperIdx); 252 void addPhysRegDeps(SUnit *SU, unsigned OperIdx); 253 void addVRegDefDeps(SUnit *SU, unsigned OperIdx); 254 void addVRegUseDeps(SUnit *SU, unsigned OperIdx);
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/external/llvm/lib/CodeGen/ |
D | ScheduleDAGInstrs.cpp | 247 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps() argument 248 const MachineOperand &MO = SU->getInstr()->getOperand(OperIdx); in addPhysRegDataDeps() 278 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse, in addPhysRegDataDeps() 290 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps() argument 292 MachineOperand &MO = MI->getOperand(OperIdx); in addPhysRegDeps() 317 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addPhysRegDeps() 329 Uses.insert(PhysRegSUOper(SU, OperIdx, MO.getReg())); in addPhysRegDeps() 334 addPhysRegDataDeps(SU, OperIdx); in addPhysRegDeps() 361 Defs.insert(PhysRegSUOper(SU, OperIdx, Reg)); in addPhysRegDeps() 385 void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) { in addVRegDefDeps() argument [all …]
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D | TargetLoweringBase.cpp | 1099 for(unsigned OperIdx = 0; OperIdx != MI->getNumOperands(); ++OperIdx) { in emitPatchPoint() local 1100 MachineOperand &MO = MI->getOperand(OperIdx); in emitPatchPoint() 1110 for (unsigned i = 0; i < OperIdx; ++i) in emitPatchPoint() 1114 MIB.addOperand(MI->getOperand(OperIdx)); in emitPatchPoint() 1117 for (unsigned i = OperIdx + 1; i != MI->getNumOperands(); ++i) in emitPatchPoint() 1140 OperIdx += (MIB->getNumOperands() - MI->getNumOperands()) - 1; in emitPatchPoint()
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/external/llvm/lib/Transforms/Utils/ |
D | SimplifyIndVar.cpp | 95 unsigned OperIdx = 0; in foldIVUser() local 104 if (IVOperand != UseInst->getOperand(OperIdx) || in foldIVUser() 141 UseInst->setOperand(OperIdx, IVSrc); in foldIVUser()
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/external/llvm/utils/TableGen/ |
D | CodeGenSchedule.cpp | 1158 unsigned OperIdx = RWSequences.size()-1; in pushVariant() local 1163 RWSequences.push_back(RWSequences[OperIdx]); in pushVariant() 1170 RWI != RWE; ++RWI, ++OperIdx) { in pushVariant() 1176 RWSequences[OperIdx].insert(RWSequences[OperIdx].end(), in pushVariant() 1179 assert(OperIdx == RWSequences.size() && "missed a sequence"); in pushVariant()
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