| /external/llvm/test/CodeGen/X86/ |
| D | patchpoint-verifiable.mir | 3 # verifying the PATCHPOINT instruction.
38 …; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, impli…
39 …PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %…
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| /external/llvm/test/CodeGen/MIR/X86/ |
| D | liveout-register-mask.mir | 38 ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, liveout(%esp, %rsp, %sp, %spl),
39 …PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, liveout(%esp, %rsp, %sp, %spl), implicit-def dead ea…
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| /external/llvm/include/llvm/Target/ |
| D | TargetOpcodes.h | 107 PATCHPOINT = 18, enumerator
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| D | Target.td | 875 def PATCHPOINT : Instruction {
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| /external/llvm/lib/CodeGen/ |
| D | StackMapLivenessAnalysis.cpp | 130 if (I->getOpcode() == TargetOpcode::PATCHPOINT) { in calculateLiveness()
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| D | TargetInstrInfo.cpp | 444 case TargetOpcode::PATCHPOINT: { in foldPatchpoint()
515 MI->getOpcode() == TargetOpcode::PATCHPOINT) { in foldMemoryOperand()
793 MI->getOpcode() == TargetOpcode::PATCHPOINT) && in foldMemoryOperand()
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| D | LocalStackSlotAllocation.cpp | 297 MI->getOpcode() == TargetOpcode::PATCHPOINT) in insertFrameReferenceRegisters()
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| D | StackMaps.cpp | 353 assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint"); in recordPatchPoint()
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| D | InlineSpiller.cpp | 1095 MI->getOpcode() == TargetOpcode::PATCHPOINT || in foldMemoryOperand()
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| D | MachineVerifier.cpp | 836 if (MCID.getOpcode() == TargetOpcode::PATCHPOINT) in visitMachineOperand()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AsmPrinter.cpp | 379 MII->getOpcode() == TargetOpcode::PATCHPOINT || in LowerSTACKMAP()
541 case TargetOpcode::PATCHPOINT: in EmitInstruction()
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| D | AArch64RegisterInfo.cpp | 373 MI.getOpcode() == TargetOpcode::PATCHPOINT) { in eliminateFrameIndex()
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| D | AArch64ISelLowering.cpp | 1035 case TargetOpcode::PATCHPOINT: in EmitInstrWithCustomInserter()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 741 MI.getOpcode() == TargetOpcode::PATCHPOINT) in getOffsetONFromFION()
821 OpC != TargetOpcode::PATCHPOINT && !ImmToIdxMap.count(OpC); in eliminateFrameIndex()
848 OpC == TargetOpcode::PATCHPOINT)) { in eliminateFrameIndex()
1039 MI->getOpcode() == TargetOpcode::PATCHPOINT || in isFrameOffsetLegal()
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| D | PPCAsmPrinter.cpp | 344 MII->getOpcode() == TargetOpcode::PATCHPOINT || in LowerSTACKMAP()
505 case TargetOpcode::PATCHPOINT: in EmitInstruction()
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| D | PPCInstrInfo.cpp | 1788 } else if (Opcode == TargetOpcode::PATCHPOINT) { in GetInstSizeInBytes()
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| D | PPCISelLowering.cpp | 8597 MI->getOpcode() == TargetOpcode::PATCHPOINT) { in EmitInstrWithCustomInserter()
8599 MI->getOpcode() == TargetOpcode::PATCHPOINT) { in EmitInstrWithCustomInserter()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 755 if (Opc == TargetOpcode::STACKMAP || Opc == TargetOpcode::PATCHPOINT) { in EmitMachineNode()
760 if (Opc == TargetOpcode::PATCHPOINT) { in EmitMachineNode()
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| D | ScheduleDAGSDNodes.cpp | 542 if (POpc == TargetOpcode::PATCHPOINT && in InitNodeNumDefs()
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| D | FastISel.cpp | 837 TII.get(TargetOpcode::PATCHPOINT)); in selectPatchpoint()
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| D | SelectionDAGBuilder.cpp | 6938 MachineSDNode *MN = DAG.getMachineNode(TargetOpcode::PATCHPOINT, in visitPatchpoint()
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 597 if (Opc == TargetOpcode::STACKMAP || Opc == TargetOpcode::PATCHPOINT) { in eliminateFrameIndex()
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| D | X86MCInstLower.cpp | 1211 case TargetOpcode::PATCHPOINT: in EmitInstruction()
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| D | X86ISelLowering.cpp | 22476 case TargetOpcode::PATCHPOINT: in EmitInstrWithCustomInserter()
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